High-precision RNS-CKKS on fixed but smaller word-size architectures: theory and application

A prevalent issue in the residue number system (RNS) variant of the Cheon-Kim-Kim-Song (CKKS) homomorphic encryption (HE) scheme is the challenge of efficiently achieving high precision on hardware architectures with a fixed, yet smaller, word-size of bit-length $W$, especially when the scaling factor satisfies $\log\Delta > W$. In this work, we introduce an efficient solution termed composite scaling. In this approach, we group multiple RNS primes as $q_\ell:= \prod_{j=0}^{t-1} q_{\ell,j}$ such that $\log q_{\ell,j} < W$ for $0\le j < t$, and use each composite $q_\ell$ in the rescaling procedure as $\mathsf{ct}\mapsto \lfloor \mathsf{ct} / q_\ell\rceil$. Here, the number of primes, denoted by $t$, is termed the composition degree. This strategy contrasts the traditional rescaling method in RNS-CKKS, where each $q_\ell$ is chosen as a single $\log\Delta$-bit prime, a method we designate as single scaling. To achieve higher precision in single scaling, where $\log\Delta > W$, one would either need a novel hardware architecture with word size $W\u27 > \log\Delta$ or would have to resort to relatively inefficient solutions rooted in multi-precision arithmetic. This problem, however, doesn\u27t arise in composite scaling. In the composite scaling approach, the larger the composition degree $t$, the greater the precision attainable with RNS-CKKS across an extensive range of secure parameters tailored for workload deployment. We have integrated composite scaling RNS-CKKS into both OpenFHE and Lattigo libraries. This integration was achieved via a concrete implementation of the method and its application to the most up-to-date workloads, specifically, logistic regression training and convolutional neural network inference. Our experiments demonstrate that single and composite scaling approaches are functionally equivalent, both theoretically and practically

Design and Analysis of High Power and Low Harmonic for Multi Band Wireless Application

The objective of this research is to demonstrate the feasibility of the implementation of low-cost, small-size, and high power RF front ends using CMOS technology which has been known not to be suitable for high-power applications due to its material characteristic. One part of this research focuses on developing GaAs switches for multi band and multi mode high power applications. The development of RF front end switches for high power applications using CMOS technology is very challenging in that the characteristics of CMOS technology such as low breakdown voltages, slow electron mobility and existence of substrate junction diodes are limiting power handling capability of CMOS technology. Various topologies of CMOS switches have been employed in implementing high power RF front end CMOS switches in order to overcome material limitations of CMOS technology in high power applications. Based on measurement data such as power handling capability and S-parameters of fabricated CMOS switches, the feasibility of use of CMOS technology in high power RF antenna switch design has been studied, and novel methods of designing CMOS switches to improve the power handling capability without compensating S-parameter performance are proposed. As a part of this research, multi-band and multi-mode power switches using GaAs technology are fabricated and tested for use of the commercial applications such as handsets covering GSM, PCS/DCS, and UMTS bands. Current commercial RF switch products demand small size, low cost and low voltage control as the number of wireless standards integrated in a single application increases. This research provides a solution for commercial products which can meet all the specifications as well as needs required in the wireless market.Ph.D.Committee Chair: Joy Laskar; Committee Member: Chang-Ho Lee; Committee Member: Gordon Stuber; Committee Member: Jaejoon Chang; Committee Member: Kevin T. Kornegay; Committee Member: Manos Tentzeri

IDEA: Integrating Divisive and Ensemble-Agglomerate hierarchical clustering framework for arbitrary shape data

© 2021 IEEE.Hierarchical clustering, a traditional clustering method, has been getting attention again. Among several reasons, a credit goes to a recent paper by Dasgupta in 2016 that proposed a cost function that quantitatively evaluates hierarchical clustering trees. An important question is how to combine this recent advance with existing successful clustering methods. In this paper, we propose a hierarchical clustering method to minimize the cost function of clustering tree by incorporating existing clustering techniques. First, we developed an ensemble tree-search method that finds an integrated tree with reduced cost by integrating multiple existing hierarchical clustering methods. Second, to operate on large and arbitrary shape data, we designed an efficient hierarchical clustering framework, called integrating divisive and ensemble-agglomerate (IDEA) by combining it with advanced clustering techniques such as nearest neighbor graph construction, divisive-agglomerate hybridization, and dynamic cut tree. The IDEA clustering method showed better performance in minimizing Dasgupta&apos;s cost and improving accuracy (adjusted rand index) over existing cost-minimization-based, and density-based hierarchical clustering methods in experiments using arbitrary shape datasets and complex biology-domain datasets.N

Analysis and Design Techniques of CMOS Charge-Pump-Based Radio-Frequency Antenna-Switch Controllers

Analysis and design techniques of charge-pump-based RF antenna-switch controllers are presented. Loading effects of RF antenna switches that cause voltage drop of the controller have been identified and embedded in the analysis. The proposed analysis also captures effects of MOS-switch on-resistance and parasitic capacitances, so more precise descriptions of the charge-pump output voltage can be obtained. Furthermore, the body biasing technique has been employed to prevent latch-up. The analysis and the design techniques have been verified using a 0.35-mu m CMOS technology. RF antenna-switch performances with the designed controller have also been measured and presented.ope