A single--path--oriented fault--effect propagation in digital circuits considering multiple--path sensitization

Various satisfiability problems in combinational logic blocks as, for example, test pattern generation, verification, and netlist optimization, can be solved efficiently by exploiting the fundamental concepts of propagation and justification. Therefore, fault effect propagation gains further importance. For the first time, we provide the theoretical background for a single path oriented fault effect propagationconsidering both single and multiple path sensitization. We call this approach SPOP. Furthermore, we formulate necessary and sufficient sensitization conditions for SPOP. From these conditions the best suited algebra for propagation can be derived. Experimental results for stuck–at test pattern generation demonstrate that the new approach is orthogonal to D–frontier based methods. We achieve substantial improvements with respect to test pattern generation time and quality.

Remarks on Statistical Design Centering

The paper overviews optimization based statistical design centering techniques for analog circuits. Emphasis is placed on dependence between formulation of quality indices, problem formulation, and computational complexity of design centering algorithms, executed in single- or multiple-processor environments. For characterization of solution techniques a standard CMOS op-amp design case and a simplified computational complexity analysis are used