Top-gate microcrystalline silicon TFTs processed at low temperature (<200ºC)

N-type as well P-type top-gate microcrystalline silicon thin film transistors (TFTs) are fabricated on glass substrates at a maximum temperature of 200 °C. The active layer is an undoped μc-Si film, 200 nm thick, deposited by Hot-Wire Chemical Vapor. The drain and source regions are highly phosphorus (N-type TFTs) or boron (P-type TFTs)-doped μc-films deposited by HW-CVD. The gate insulator is a silicon dioxide film deposited by RF sputtering. Al-SiO 2-N type c-Si structures using this insulator present low flat-band voltage,-0.2 V, and low density of states at the interface D it=6.4×10 10 eV -1 cm -2. High field effect mobility, 25 cm 2/V s for electrons and 1.1 cm 2/V s for holes, is obtained. These values are very high, particularly the hole mobility that was never reached previously

Low temperature amorphous and nanocrystalline silicon thin film transistors deposited by Hot-Wire CVD on glass substrate

Amorphous and nanocrystalline silicon films obtained by Hot-Wire Chemical Vapor Deposition have been incorporated as active layers in n-type coplanar top gate thin film transistors deposited on glass substrates covered with SiO 2. Amorphous silicon devices exhibited mobility values of 1.3 cm 2 V - 1 s - 1, which are very high taking into account the amorphous nature of the material. Nanocrystalline transistors presented mobility values as high as 11.5 cm 2 V - 1 s - 1 and resulted in low threshold voltage shift (∼ 0.5 V)

Top-gate microcrystalline silicon TFTs processed at low temperature (<200°c)

International audienc

Top-gate microcrystalline silicon TFTs processed at low temperature (<200°c)

International audienc

Polycrystalline silicon films obtained by crystallization of amorphous silicon on aluminium based substrates for photovoltaic applications

The fabrication of crystalline silicon thin films on foreign substrates is an attractive and alternative approach to the ingot casting aiming to the reduction of the total costs of photovoltaic cells and modules. The purpose of this work is to describe the CRYSTALSI process which aims at forming polycrystalline silicon films thanks to the thermal crystallization of amorphous silicon layer deposited on aluminium based substrates. The latest are used as a catalyzer for silicon crystallization but also as a back metal contact and reflector for photovoltaic solar cells. Two types of aluminium substrates were applied in these studies: a pure aluminium substrate (99.7% purity) and a silicon rich aluminium substrate containing about 12% of silicon. Silicon thicknesses between 1 and 10 mu m were deposited and then annealed at temperatures of 490 degrees C, 520 degrees C and 550 degrees C and for duration times from 5 min to 12 h. The crystallized silicon films were then characterized by Raman spectroscopy, by scanning electron microscopy and by electron backscatter diffraction. The analyses show that the resulting annealed film is composed of two distinct layers: a thin polycrystalline silicon film located just above the substrate and a thicker layer made of a mixture of silicon and aluminium. Contrary to the case of the pure aluminium substrate, the silicon rich aluminium substrate allow to obtain thick and continuous polycrystalline silicon layers due to a controlled diffusion of the silicon within the substrate. As a result, the crystallization at 550 degrees C of 5 mu m thick amorphous silicon on silicon rich aluminium substrate led to the formation of a thick polycrystalline silicon layer composed of grains of few micrometers in size. A low activation energy of about 2 eV is extracted suggesting that the silicon rich aluminium substrate is a catalyzer for the crystallization of amorphous silicon. As for the AIC process, it can be noticed that the limiting step of the CRYSTALSI process is the diffusion of the silicon in the aluminium. A chemical etching using a HNO3, HF, H2O (72.5 ml/1.5 ml/28ml) solution is found to be appropriate to remove the residual top layer, in order to have access to the polycrystalline silicon layer. This work demonstrates that the CRYSTALSI process can lead to the formation of polysilicon films that can serve as a seed layer for the growth of a thicker absorbing silicon film for photovoltaic applications. (C) 2017 Elsevier B.V. All rights reserved

Top-gate microcrystalline silicon TFTs processed at low temperature (<200ºC)

N-type as well P-type top-gate microcrystalline silicon thin film transistors (TFTs) are fabricated on glass substrates at a maximum temperature of 200 °C. The active layer is an undoped μc-Si film, 200 nm thick, deposited by Hot-Wire Chemical Vapor. The drain and source regions are highly phosphorus (N-type TFTs) or boron (P-type TFTs)-doped μc-films deposited by HW-CVD. The gate insulator is a silicon dioxide film deposited by RF sputtering. Al-SiO 2-N type c-Si structures using this insulator present low flat-band voltage,-0.2 V, and low density of states at the interface D it=6.4×10 10 eV -1 cm -2. High field effect mobility, 25 cm 2/V s for electrons and 1.1 cm 2/V s for holes, is obtained. These values are very high, particularly the hole mobility that was never reached previously

NanoSilicon based Electronics processed at very low temperature (T<180° C)

International audienc

Low temperature amorphous and nanocrystalline silicon thin film transistors deposited by Hot-Wire CVD on glass substrate

Amorphous and nanocrystalline silicon films obtained by Hot-Wire Chemical Vapor Deposition have been incorporated as active layers in n-type coplanar top gate thin film transistors deposited on glass substrates covered with SiO 2. Amorphous silicon devices exhibited mobility values of 1.3 cm 2 V - 1 s - 1, which are very high taking into account the amorphous nature of the material. Nanocrystalline transistors presented mobility values as high as 11.5 cm 2 V - 1 s - 1 and resulted in low threshold voltage shift (∼ 0.5 V)