10,516 research outputs found

    The role of inhibitory G proteins and regulators of G protein signaling in the in vivo control of heart rate and predisposition to cardiac arrhythmias

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    Inhibitory heterotrimeric G proteins and the control of heart rate. The activation of cell signaling pathways involving inhibitory heterotrimeric G proteins acts to slow the heart rate via modulation of ion channels. A large number of Regulators of G protein signalings (RGSs) can act as GTPase accelerating proteins to inhibitory G proteins and thus it is important to understand the network of RGS\G-protein interaction. We will review our recent findings on in vivo heart rate control in mice with global genetic deletion of various inhibitory G protein alpha subunits. We will discuss potential central and peripheral contributions to the phenotype and the controversies in the literature

    1-Bit Massive MIMO Downlink Based on Constructive Interference

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    In this paper, we focus on the multiuser massive multiple-input single-output (MISO) downlink with low-cost 1-bit digital-to-analog converters (DACs) for PSK modulation, and propose a low-complexity refinement process that is applicable to any existing 1-bit precoding approaches based on the constructive interference (CI) formulation. With the decomposition of the signals along the detection thresholds, we first formulate a simple symbol-scaling method as the performance metric. The low-complexity refinement approach is subsequently introduced, where we aim to improve the introduced symbol-scaling performance metric by modifying the transmit signal on one antenna at a time. Numerical results validate the effectiveness of the proposed refinement method on existing approaches for massive MIMO with 1-bit DACs, and the performance improvements are most significant for the low-complexity quantized zero-forcing (ZF) method.Comment: 5 pages, EUSIPCO 201

    Digital control of dual-load LCLC resonant converters

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    The paper proposes the analysis, design and realisation of dual-output resonant LCLC converters with independent output regulation, employing a single power stage and combined PWM and frequency control. Asymmetric switching of the power devices is used to facilitate independent control of the outputs to provide +5 V and +3.3 V from a 15 V-20 V input supply over a range of load condition

    Rapid analysis & design methodologies of High-Frequency LCLC Resonant Inverter as Electrodeless Fluorescent Lamp Ballast

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    The papers presents methodologies for the analysis of 4th-order LCLC resonant power converters operating at 2.63 MHz as fluorescent lamp ballasts, where high frequency operation facilitates capacitive discharge into the tube, with near resonance operation at high load quality factor enabling high efficiency. State-variable dynamic descriptions of the converter are employed to rapidly determine the steady-state cyclic behaviour of the ballast during nominal operation. Simulation and experimental measurements from a prototype ballast circuit driving a 60 cm, 8W T5 fluorescent lamp are also included

    Massive MIMO 1-Bit DAC Transmission: A Low-Complexity Symbol Scaling Approach

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    We study multi-user massive multiple-input single-output (MISO) systems and focus on downlink transmission, where the base station (BS) employs a large antenna array with low-cost 1-bit digital-to-analog converters (DACs). The direct combination of existing beamforming schemes with 1-bit DACs is shown to lead to an error floor at medium-to-high SNR regime, due to the coarse quantization of the DACs with limited precision. In this paper, based on the constructive interference we consider both a quantized linear beamforming scheme where we analytically obtain the optimal beamforming matrix, and a non-linear mapping scheme where we directly design the transmit signal vector. Due to the 1-bit quantization, the formulated optimization for the non-linear mapping scheme is shown to be non-convex. To solve this problem, the non-convex constraints of the 1-bit DACs are firstly relaxed, followed by an element-wise normalization to satisfy the 1-bit DAC transmission. We further propose a low-complexity symbol scaling scheme that consists of three stages, in which the quantized transmit signal on each antenna element is selected sequentially. Numerical results show that the proposed symbol scaling scheme achieves a comparable performance to the optimization-based non-linear mapping approach, while its corresponding complexity is negligible compared to that of the non-linear scheme.Comment: 15 page

    Modelling and regulation of dual-output LCLC resonant converters

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    The analysis, design and control of 4th-order LCLC voltage-output series-parallel resonant converters (SPRCs) for the provision of multiple regulated outputs, is described. Specifically, state-variable concepts are employed and new analysis techniques are developed to establish operating mode boundaries with which to describe the internal behaviour of a dual-output resonant converter topology. The designer is guided through the most important criteria for realising a satisfactory converter, and the impact of parameter choices on performance is explored. Predictions from the resulting models are compared with those obtained from SPICE simulations and measurements from a prototype power supply under closed loop control

    Improved Memoryless RNS Forward Converter Based on the Periodicity of Residues

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    The residue number system (RNS) is suitable for DSP architectures because of its ability to perform fast carry-free arithmetic. However, this advantage is over-shadowed by the complexity involved in the conversion of numbers between binary and RNS representations. Although the reverse conversion (RNS to binary) is more complex, the forward transformation is not simple either. Most forward converters make use of look-up tables (memory). Recently, a memoryless forward converter architecture for arbitrary moduli sets was proposed by Premkumar in 2002. In this paper, we present an extension to that architecture which results in 44% less hardware for parallel conversion and achieves 43% improvement in speed for serial conversions. It makes use of the periodicity properties of residues obtained using modular exponentiation
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