Cancer-associated mutations reveal a novel role for EpCAM as an inhibitor of cathepsin-L and tumor cell invasion

BACKGROUND: EpCAM (Epithelial cell adhesion molecule) is often dysregulated in epithelial cancers. Prior studies implicate EpCAM in the regulation of oncogenic signaling pathways and epithelial-to-mesenchymal transition. It was recently demonstrated that EpCAM contains a thyroglobulin type-1 (TY-1) domain. Multiple proteins with TY-1 domains are known to inhibit cathepsin-L (CTSL), a cysteine protease that promotes tumor cell invasion and metastasis. Analysis of human cancer sequencing studies reveals that somatic EpCAM mutations are present in up to 5.1% of tested tumors. METHODS: The Catalogue of Somatic Mutations in Cancer (COSMIC) database was queried to tabulate the position and amino acid changes of cancer associated EpCAM mutations. To determine how EpCAM mutations affect cancer biology we studied C66Y, a damaging TY-1 domain mutation identified in liver cancer, as well as 13 other cancer-associated EpCAM mutations. In vitro and in vivo models were used to determine the effect of wild type (WT) and mutant EpCAM on CTSL activity and invasion. Immunoprecipitation and localization studies tested EpCAM and CTSL protein binding and determined compartmental expression patterns of EpCAM mutants. RESULTS: We demonstrate that WT EpCAM, but not C66Y EpCAM, inhibits CTSL activity in vitro, and the TY-1 domain of EpCAM is responsible for this inhibition. WT EpCAM, but not C66Y EpCAM, inhibits tumor cell invasion in vitro and lung metastases in vivo. In an extended panel of human cancer cell lines, EpCAM expression is inversely correlated with CTSL activity. Previous studies have demonstrated that EpCAM germline mutations can prevent EpCAM from being expressed at the cell surface. We demonstrate that C66Y and multiple other EpCAM cancer-associated mutations prevent surface expression of EpCAM. Cancer-associated mutations that prevent EpCAM cell surface expression abrogate the ability of EpCAM to inhibit CTSL activity and tumor cell invasion. CONCLUSIONS: These studies reveal a novel role for EpCAM as a CTSL inhibitor, confirm the functional relevance of multiple cancer-associated EpCAM mutations, and suggest a therapeutic vulnerability in cancers harboring EpCAM mutations

Minimizing Acquisition Maximizing Inference -- A demonstration on print error detection

Is it possible to detect a feature in an image without ever looking at it? Images are known to have sparser representation in Wavelets and other similar transforms. Compressed Sensing is a technique which proposes simultaneous acquisition and compression of any signal by taking very few random linear measurements (M). The quality of reconstruction directly relates with M, which should be above a certain threshold for a reliable recovery. Since these measurements can non-adaptively reconstruct the signal to a faithful extent using purely analytical methods like Basis Pursuit, Matching Pursuit, Iterative thresholding, etc., we can be assured that these compressed samples contain enough information about any relevant macro-level feature contained in the (image) signal. Thus if we choose to deliberately acquire an even lower number of measurements - in order to thwart the possibility of a comprehensible reconstruction, but high enough to infer whether a relevant feature exists in an image - we can achieve accurate image classification while preserving its privacy. Through the print error detection problem, it is demonstrated that such a novel system can be implemented in practise

800-nA Process-and-Voltage-Invariant 106-dB PSRR PTAT Current Reference

This brief presents a novel process-and-voltage invariant proportional to absolute temperature (PTAT) current reference. The proposed circuit is designed and fabricated in 180-nm mixed-mode CMOS technology. Measurement results show that the I-PTAT varies only by +/- 2.4% (+/- 3 sigma/mean) across 18 test chips. One thousand Monte Carlo simulation runs show that the maximum deviation (+/- 3 sigma/mean) from the desired value of the PTAT current is +/- 5.4%. The proposed PTAT current reference uses a process, voltage, and temperature (PVT)-invariant resistor circuit having R-ON variation reduced by 4.2 times, as compared to a fixed biased MOSFET. The proposed PTAT current reference draws only 800-nA current from the supply voltage and also exhibits a high dc power supply rejection ratio (PSRR) of 106 dB. This brief also presents a PVT-invariant transconductance using the implemented PVT-invariant resistor

A Fully On-Chip PT-Invariant Transconductor

This brief presents a novel process and temperature (PT)-invariant transconductor, fabricated and tested in 180-nm CMOS technology. It uses a novel bias circuit for implementing a PT-invariant transconductor using a MOSFET in triode region. Measurements show that the transconductance varies only by +/- 3.4% across 18 fabricated chips and over temperatures ranging from 25 degrees C to 100 degrees C. Simulations show that variation of the transconductance across process corners is +/- 6.7% and across temperature range of 0 degrees C to 100 degrees C is +/- 1.6%. The proposed PT-invariant transconductor has the minimum variation among the fully on-chip transconductors reported so far. The proposed circuit consumes 136 mu W of power

Low-power low-noise analog signal conditioning chip with on-chip drivers for healthcare applications

This paper presents an ultra low-noise, low-voltage complete analog signal conditioning chip, fabricated in 180 nm mixed-mode CMOS process. In contrast to many already-reported biomedical chips the test chip has been fabricated in a relatively scaled technology operating at low supply voltage of 1.8 V. This enables targeting energy-efficient hand-held biomedical devices where low-noise analog signal conditioning, preliminary processing and low-power wireless functionalities will be integrated on one chip. The test chip features instrumentation amplifier (INA) with chopper modulation at the first stage. The second stage is a novel area efficient spike removal filter (SRF) for attenuating coupled chopping spikes. The last stage is a differential active RC filter to adjust gain and bandwidth of the forward channel. On-chip non-overlapping clock generators with frequency of 4 kHz and 8 kHz for SRF stage are also implemented on the test. The chip also features a reconfigurable driven-right-leg circuit (DRLC) and shield drive amplifier (SDA) in the feedback path specifically for portable healthcare instruments. The DRLC provides the feedback either with operational amplifier (op-amp) or operational transconductance amplifier (OTA), configurable by the user. The presented test chip, for the first time, demonstrates an integrated OTA-based DRLC along with INA. INA and drivers have been designed and optimized for minimum power dissipation using a power-oriented design flow. The measurement results show that the INA achieves input-referred noise density of 28 nv/root Hz and DC current of 5.9 mu A maintaining minimum of 109 dB at 1.91 kHz. Measurements also show that 34 dB interference reduction at 50 Hz is achieved with DRLC. Low operating voltage, wide range of specifications and reconfigurable modules and interconnections enable the chip to be used for broad range of signal conditioning applications. (C) 2012 Elsevier Ltd. All rights reserved

A Sub-1 V, 120 nW, PVT-Variation Tolerant, Tunable, and Scalable Voltage Reference With 60-dB PSNA

This paper presents a novel low-power process, voltage and temperature (PVT)-variation tolerant voltage reference generator that can be easily redesigned across various CMOS technologies. The proposed circuit architecture can be used in standalone analog integrated circuits that may not require nano-scale technologies as well as system-on-a-chip applications that need analog circuits in a much lower technology node due to their dominant digital counterparts. The reference generator implements weighted averaging of a PTAT (proportional to absolute temperature) and a CTAT (complementary to absolute temperature) voltage at zero temperature coefficient (ZTC) point. PVT-variation tolerant behavior is achieved by using an on-chip shift register based switching circuit that adjusts the bias current of a key transistor in the circuit. The proposed reference generator is fabricated in 180 nm mixed-mode CMOS technology and also designed in 65 and 28 nm technologies using foundry provided models. For a temperature range from 0 to 75 degrees C at 1.8 V supply, the measured tuned output voltage varies by only +/- 0.33% across 17 chips, which is significantly lower than all previously reported works