Comparative Study of C-V Characteristics in Si-NWFET and MOSFET (Invited paper)

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Reliable Extraction of Series Resistance in Silicon Nanowire FETs Using Y-function Technique

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Investigation of GIDL Behavior in Si-Nanowire FET with Hot Carrier Stress

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Accurate Extraction of Volume Trap Density from Si-Nanowire FET using the Newly Developed Cylindrical Coordinate Based 1/f noise model

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Analysis of Parasitic Bottom Capacitance in n- and p-type Si-Nanowire Field Effect Transistors on Bulk

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C-V Characteristics and Analysis of Undoped Gate-All-Around Nanowire FET Array

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Characteristics of Gate-All-Around Si-NWFET, including Rsd, Cylindrical Coordinate Based 1/f Noise and Hot Carrier Effects

1