1 research outputs found

    Implementation of Power Clock Generation Method for Pass-Transistor Adiabatic Logic 4:1 MUX

    Get PDF
    we proposed a sinusoidal single phase power clock generation method for 4:1 MUX which is designed in adiabatic logic form. For the power clock generation we presented radio frequency (3 KHz to 3 GHz) DC-AC converter. We have also obtained square wave from RC square wave oscillator consisting of cascaded NOT gates. This square wave and its inverted and phase shifted version are used as gate-drive signals for MOSFET switches those are used in the LC sine wave resonant circuit. The obtained power clock is then applied to a 4:1 MUX which is implemented in Pass-transistor Adiabatic Logic (PAL) style to illustrate power saving. It is observed that PAL 4:1 MUX is about 2 times more power efficient than that of conventional CMOS 4:1 MUX. If for 4:1 MUX, PAL logic is implemented in place of conventional CMOS logic, power saving per MUX that is achieved is about 47%. A 1 µm technology with ml2_20 as library is used for obtaining simulation results. DOI: 10.17762/ijritcc2321-8169.15060
    corecore