2 research outputs found
Verified optimizations for the Intel IA-64 architecture. In: TPHOLs 00: Theorem Proving in Higher-Order Logics
Abstract. This paper outlines a formal model of the Intel IA-64 architecture, and explains how this model can be used to verify the correctness of assembly-level code optimizations. The formalization and proofs were carried out using the HOL Light theorem prover.