Verification strategy for integration 3G baseband SoC

The verification strategy of the second generation Motorola tri-processors baseband chip for the 3G wireless phone market is presented. The next generation of wireless phones supports multiple wireless protocols, high data bandwidth and a full range of multi-media applications running on an open OS. The baseband chip provides the integrated processing platform for such terminals. Baseband chips are among the most complex System on Chip (SoC) of this industry. The verification strategy to integrate such highly complex SoC is multi-fold and adaptive: hierarchical across the different abstraction levels with special emphasis on verification corners related to the abstraction level. The SoC architecture validation and optimization step should occur very early-on in the design cycle but require high level modeling methodology to capture the complete hardware and mission critical use cases and deliver quantitative data on the architecture. Adaptive verification scenarios are discussed across the abstraction levels and the SoC hierarchy, from stand-alone IP verification, through sub platforms and to the SoC level. A collection of metrics are presented and illustrate the efforts required to verify such complex SoC. We conclude with proposals and opportunities to enhance the SoC verification strategies based on the lessons learned