Using An MDE Approach for Modeling of Interconnection networks

International audienceModern System-on-Chip (SoCs) are becoming more complex with the integration of heterogeneous components. Therefore, a high performance interconnection medium is required to handle the complexity. Thus Network-on-Chips (NoCs) come into play enabling the integration of more Intellectual Properties (IPs) into the SoC with increased performance. The NoCs are based on the concept of Interconnection Networks for connecting parallel machines. In the recent MARTE (Modeling and Analysis of Real-time and Embedded Systems) Profile, a notion of multidimensional multiplicity has been proposed to model repetitive structures and topologies. This paper presents a modeling methodology based on that notation that can be used to model the Delta Network family of Interconnection Networks for NoC construction