Digital Signal Processing Education: Technology and Tradition

In this paper we discuss a DSP course presented to both University students and to participants on industrial short courses. The "traditional" DSP course will typically run over one to two semesters and usually cover the fundamental mathematics of z-, Laplace and Fourier transforms, followed by the algorithm and application detail. In the course we will discuss, the use of advanced DSP software and integrated support software allow the presentation time to be greatly shortened and more focussed algorithm and application learning to be introduced. By combining the traditional lecture with the use of advanced DSP software, all harnessed by the web, we report on the objectives, syllabus, and mode of teaching

Real-time digital signal processing system for normal probe diffraction technique

Ultrasonic systems are widely used in many fields of non-destructive testing. The increasing requirement for high quality steel product stirs the improvement of both ultrasonic instruments and testing methods. The thesis indicates the basics of ultrasonic testing and Digital Signal Processing (DSP) technology for the development of an ultrasonic system. The aim of this project was to apply a new ultrasonic testing method - the Normal Probe Diffraction method to course grained steel in real-time and investigate whether the potential of probability of detection (POD) has been improved. The theories and corresponding experiment set-up of pulse-echo method, TOFD and NPD method are explained and demonstrated separately. A comparison of these methods shows different contributions made by these methods using different types of algorithms and signals. Non-real-time experiments were carried out on a VI calibration block using an USPC 3100 ultrasonic testing card to implement pulse-echo and NPD method respectively. The experiments and algorithm were simulated and demonstrated in Matlab. A low frequency Single-transmitter-multi-receiver ultrasonic system was designed and built with a digital development board and an analogue daughter card to transmit or receive signals asynchronously. A high frequency high voltage amplifier was designed to drive the ultrasonic probes. A Matlab simulation system built with Simulink indicates that the Signal to Noise Ratio (SNR) can be improved with an increment of up to 3dB theoretically based on the simulation results using DSP techniques. The DSP system hardware and software was investigated and a real-time DSP hardware system was supposed to be built to implement the high frequency system using a rapid code generated system based on Matlab Simulink model and the method was presented. However, extra effort needs to be taken to program the hardware using a low-level computer language to make the system work stably and efficiently

Comparative Study of Various Systems on Chips Embedded in Mobile Devices

Systems-on-chips (SoCs) are the latest incarnation of very large scale integration (VLSI) technology. A single integrated circuit can contain over 100 million transistors. Harnessing all this computing power requires designers to move beyond logic design into computer architecture, meet real-time deadlines, ensure low-power operation, and so on. These opportunities and challenges make SoC design an important field of research. So in the paper we will try to focus on the various aspects of SOC and the applications offered by it. Also the different parameters to be checked for functional verification like integration and complexity are described in brief. We will focus mainly on the applications of system on chip in mobile devices and then we will compare various mobile vendors in terms of different parameters like cost, memory, features, weight, and battery life, audio and video applications. A brief discussion on the upcoming technologies in SoC used in smart phones as announced by Intel, Microsoft, Texas etc. is also taken up. Keywords: System on Chip, Core Frame Architecture, Arm Processors, Smartphone

Efficient arithmetic for high speed DSP implementation on FPGAs

The author was sponsored by EnTegra Ltd, a company who develop hardware and software products and services for the real time implementation of DSP and RF systems. The field programmable gate array (FPGA) is being used increasingly in the field of DSP. This is due to the fact that the parallel computing power of such devices is ideal for today’s truly demanding DSP algorithms. Algorithms such as the QR-RLS update are computationally intensive and must be carried out at extremely high speeds (MHz). This means that the DSP processor is simply not an option. ASICs can be used but the expense of developing custom logic is prohibitive. The increased use of the FPGA in DSP means that there is a significant requirement for efficient arithmetic cores that utilises the resources on such devices. This thesis presents the research and development effort that was carried out to produce fixed point division and square root cores for use in a new Electronic Design Automation (EDA) tool for EnTegra, which is targeted at FPGA implementation of DSP systems. Further to this, a new technique for predicting the accuracy of CORDIC systems computing vector magnitudes and cosines/sines is presented. This work allows the most efficient CORDIC design for a specified level of accuracy to be found quickly and easily without the need to run lengthy simulations, as was the case before. The CORDIC algorithm is a technique using mainly shifts and additions to compute many arithmetic functions and is thus ideal for FPGA implementation

Wireless HROV Control with Compressed Visual Feedback Using Acoustic and RF Links

Underwater cooperative robotics offers the possibility to perform challenging intervention applications, such as recovering archeological objects as within the context of the MERBOTS research project, or grasping, transporting and assembly of big objects, using more than one mobile manipulator, as faced by the TWINBOT project. In order to enhance safety during the intervention, it is reasonable to avoid the umbilical, also giving more mobility to the robots, and enabling a broader set of cooperative movements. Several solutions, based on acoustic, radiofrequency (RF) or Visual Light Communication (VLC) have been proposed for underwater communications in the literature. This paper presents the architecture of an underwater wireless communication framework for the control of multiple semi-autonomous robots in cooperative interventions. The proposed framework is composed of several modules as the virtual reality interface using UWSim, the Underwater Multi-robot Cooperative Intervention Remote Control Protocol (UMCI-RCP) and a Generic Link Layer (GLL). UMCI-RCP allows the control of an underwater robot over limited communication links. UMCI-RCP integrates a progressive compression algorithm that provides visual feedback at a constant rate and ensures image reception even in channels with loses. The Time Division Multiple Access (TDMA) medium access strategy minimizes the jitter of transmitted packets. The GLL has been designed in order to provide support for multimodal transmission (i.e. acoustic, RF and VLC) and also to interface with the UWSim-NET simulator so that facilitates the experimentation either with a real or with a simulated modem. The possibility of exchange real and simulated devices in the proposed framework are demonstrated by means of a teleoperation experiment with a BlueROV equipped with the S100 RF modems. Hardware-In-the-Loop (HIL) capabilities are demonstrated repeating the experiment with the real modems and modeling the BlueROV, and also modeling both the modems and the BlueROV

High definition systems in Japan

The successful implementation of a strategy to produce high-definition systems within the Japanese economy will favorably affect the fundamental competitiveness of Japan relative to the rest of the world. The development of an infrastructure necessary to support high-definition products and systems in that country involves major commitments of engineering resources, plants and equipment, educational programs and funding. The results of these efforts appear to affect virtually every aspect of the Japanese industrial complex. The results of assessments of the current progress of Japan toward the development of high-definition products and systems are presented. The assessments are based on the findings of a panel of U.S. experts made up of individuals from U.S. academia and industry, and derived from a study of the Japanese literature combined with visits to the primary relevant industrial laboratories and development agencies in Japan. Specific coverage includes an evaluation of progress in R&D for high-definition television (HDTV) displays that are evolving in Japan; high-definition standards and equipment development; Japanese intentions for the use of HDTV; economic evaluation of Japan's public policy initiatives in support of high-definition systems; management analysis of Japan's strategy of leverage with respect to high-definition products and systems

Design of software radio

Software Define Radio (SDR) has become a prevalent technology in wireless systems. In SDR some or all of the signal specific handling is implemented in software functions, while other functions like decimation, interpolation, digital up-conversion and digital down conversion are done on reprogrammable Digital Signal Processor or Field Programmable Gate Arrays.Twelve laboratory exercises have been designed to lead the student through the process of using the Universal Software Radio peripheral (USRP) hardware and GNU Radio open source software

Design of software radio

Software Define Radio (SDR) has become a prevalent technology in wireless systems. In SDR some or all of the signal specific handling is implemented in software functions, while other functions like decimation, interpolation, digital up-conversion and digital down conversion are done on reprogrammable Digital Signal Processor or Field Programmable Gate Arrays.Twelve laboratory exercises have been designed to lead the student through the process of using the Universal Software Radio peripheral (USRP) hardware and GNU Radio open source software

Designing A Low-Cost Educational Learning Kit Based On Arm Cortex-M Cores

In this project, a low-cost educational learning kit is designed and developed by using the NXP FRDM-KL25Z, an ARM processor based development board as a learning platform. Some peripherals is interfaced with the NXP FRDM-KL25Z to learn the embedded systems programing in C++. The main objective of this project is to design a low-cost educational learning kit for ARM processor and develop a step by step tutorial. Although the ARM processor based development board is not difficult to get now, but the tutorial for it is hard to get and understand by the beginner. A lot of compiler are compatible to the same development board nowadays. It is actually a problem to the beginner on which compiler and what platform to choose as the kick start on the embedded system programing. With the educational learning kit and the step by step tutorial to help them, they can have a better understanding to the topic learned. Some exercises are also provided after each topic to increase the understanding on that topic. The educational learning kit helped the beginner in understanding what to do with an ARM processor based development board including how to configure the compiler setting for different development board, how to include the external library to the compiler and so on. The educational kit is useful and important to help the beginner in learning the ARM processor based development board