Understanding Cache Hierarchy Interactions with a Program-Driven Simulator ∗

The increasing importance of the cache hierarchy in almost all digital systems governed by a microprocessor is demanding an appropriate set of tools to teach the interactions between caches. Students in computer organization/architecture courses face the problem of understanding how caches interact in a hierarchical organization. As caches grow in size and complexity, designing a tool to explore the different parameter interactions becomes challenging. Also, focusing only on the significant information (accessed lines and events) at different cache levels is required. In this paper we present SpimVista, a tool developed on top of PC-Spim simulator, that simulates any MIPS code on a system with different cache hierarchy configurations. Each cache memory can be configured independently. SpimVista is aimed at being used by undergraduate students, and the graphical interface has been designed addressed to ease the learning process. In particular, the tool offers an intuitive and easy interface that allows the student to focus on particular and interesting events as the program instructions are executed step-by-step. Also, students can perform interesting exercises where both the code and the impact of cache organization parameters on performance are analyzed globally