229 research outputs found
Systematic Comparison of HF CMOS Transconductors
Transconductors are commonly used as active elements in high-frequency (HF) filters, amplifiers, mixers, and oscillators. This paper reviews transconductor design by focusing on the V-I kernel that determines the key transconductor properties. Based on bandwidth considerations, simple V-I kernels with few or no internal nodes are preferred. In a systematic way, virtually all simple kernels published in literature are generated. This is done in two steps: 1) basic 3-terminal transconductors are covered and 2) then five different techniques to combine two of them in a composite V-I kernel. In order to compare transconductors in a fair way, a normalized signal-to-noise ratio (NSNR) is defined. The basic V-I kernels and the five classes of composite V-I kernels are then compared, leading to insight in the key mechanisms that affect NSNR. Symbolic equations are derived to estimate NSNR, while simulations with more advanced MOSFET models verify the results. The results show a strong tradeoff between NSNR and transconductance tuning range. Resistively generated MOSFETs render the best NSNR results and are robust for future technology developments
Rail-to-rail class AB CMOS tunable transconductor with -52dB IM3 at 1MHz
A novel CMOS tunable transconductor is presented.
The circuit operates in classAB hence featuring power efficiency.
The internal feedback employed and the use of a linearized triode
transistor for voltage-to-current conversion allows achieving high
linearity. Rail-to-rail input range is obtained by using floatinggate
transistors. Measurement results for a test chip prototype in
a 0.5µm standard CMOS process show an IM3 of -52.13dB at
1MHz for a 2Vpp input and a power consumption of 2.2mW
The design of active resistors and transductors in a CMOS technology
Merged with duplicate record 10026.1/2618 on 07.20.2017 by CS (TIS)This thesis surveys linearisation techniques for implementing monolithic MOS
active resistors and transconductors, and investigates the design of linear tunable
resistors and transconductors. Improving linearity and tunability in the presence
of non-ideal factors such as bulk modulation, mobility-degradation effects and mismatch
of transistors is a principal objective. A family of new non-saturation-mode
resistors and two novel saturation-mode transconductors are developed. Where
possible, approximate analytical expressions are derived to explain the principles
of operation. Performance comparisons of the new structures are made with other
well-known circuits and their relative advantages and disadvantages evaluated.
Experimental and simulation results are presented which validate the proposed
linearisation techniques. It is shown that the proposed family of resistors offers
improved linearity whilst the transconductors combine extended tunability with
low distortion. Continuous-time filter examples are given to demonstrate the
potential of these circuits for application in analogue signal-processing tasks.GEC Plessey Semiconductors, Plymout
Energy-Efficient Amplifiers Based on Quasi-Floating Gate Techniques
Energy efficiency is a key requirement in the design of amplifiers for modern wireless
applications. The use of quasi-floating gate (QFG) transistors is a very convenient approach to
achieve such energy efficiency. We illustrate different QFG circuit design techniques aimed to
implement low-voltage, energy-efficient class AB amplifiers. A new super class AB QFG amplifier is
presented as a design example, including some of the techniques described. The amplifier has been
fabricated in a 130 nm CMOS test chip prototype. Measurement results confirm that low-voltage,
ultra-low-power amplifiers can be designed, preserving, at the same time, excellent small-signal and
large-signal performance.Agencia Estatal de Investigación PID2019-107258RB-C32Unión Europea PID2019-107258RB-C3
Energy-efficient amplifiers based on quasi-floating gate techniques
Energy efficiency is a key requirement in the design of amplifiers for modern wireless applications. The use of quasi-floating gate (QFG) transistors is a very convenient approach to achieve such energy efficiency. We illustrate different QFG circuit design techniques aimed to implement low-voltage energy-efficient class AB amplifiers. A new super class AB QFG amplifier is presented as a design example including some of the techniques described. The amplifier has been fabricated in a 130 nm CMOS test chip prototype. Measurement results confirm that low-voltage ultra low power amplifiers can be designed preserving at the same time excellent small-signal and large-signal performance.This research was funded by AEI/FEDER, grant number PID2019-107258RB-C32
Design of Highly linear Gm-C Low Pass and Complex Band Pass Filter for High Frequency Application
The present work deals with the design of low pass filters such as 3rd order Gm-C filter, a duty cycle controlled low pass and a complex band pass filter that can be operated for high frequency applications. The linearity and power consumption of a CMOS Gm-C filter are studied and optimized.
Firstly, a doubly terminated 3rd order low-pass Gm-C filter is designed
Nonlinearity and noise modeling of operational transconductance amplifiers for continuous time analog filters
A general framework for performance optimization of continuous-time OTA-C
(Operational Transconductance Amplifier-Capacitor) filters is proposed. Efficient
procedures for evaluating nonlinear distortion and noise valid for any filter of arbitrary
order are developed based on the matrix description of a general OTA-C filter model .
Since these procedures use OTA macromodels, they can be used to obtain the results
significantly faster than transistor-level simulation. In the case of transient analysis, the
speed-up may be as much as three orders of magnitude without almost no loss of
accuracy. This makes it possible to carry out direct numerical optimization of OTA-C
filters with respect to important characteristics such as noise performance, THD, IM3,
DR or SNR. On the other hand, the general OTA-C filter model allows us to apply
matrix transforms that manipulate (rescale) filter element values and/or change topology
without changing its transfer function. The above features are a basis to build automated
optimization procedures for OTA-C filters. In particular, a systematic optimization
procedure using equivalence transformations is proposed. The research also proposes
suitable software implementations of the optimization process. The first part of the
research proposes a general performance optimization procedure and to verify the
process two application type examples are mentioned. An application example of the
proposed approach to optimal block sequencing and gain distribution of 8th order
cascade Butterworth filter (for two variants of OTA topologies) is given. Secondly the
modeling tool is used to select the best suitable topology for a 5th order Bessel Low Pass
Filter. Theoretical results are verified by comparing to transistor-level simulation withCADENCE. For the purpose of verification, the filters have also been fabricated in
standard 0.5mm CMOS process.
The second part of the research proposes a new linearization technique to
improve the linearity of an OTA using an Active Error Feedforward technique. Most
present day applications require very high linear circuits combined with low noise and
low power consumption. An OTA based biquad filter has also been fabricated in 0.35mm
CMOS process. The measurement results for the filter and the stand alone OTA have
been discussed. The research focuses on these issues
Floating-Gate Design and Linearization for Reconfigurable Analog Signal Processing
Analog and mixed-signal integrated circuits have found a place in modern electronics design as a viable alternative to digital pre-processing. With metrics that boast high accuracy and low power consumption, analog pre-processing has opened the door to low-power state-monitoring systems when it is utilized in place of a power-hungry digital signal-processing stage. However, the complicated design process required by analog and mixed-signal systems has been a barrier to broader applications. The implementation of floating-gate transistors has begun to pave the way for a more reasonable approach to analog design. Floating-gate technology has widespread use in the digital domain. Analog and mixed-signal use of floating-gate transistors has only become a rising field of study in recent years. Analog floating gates allow for low-power implementation of mixed-signal systems, such as the field-programmable analog array, while simultaneously opening the door to complex signal-processing techniques. The field-programmable analog array, which leverages floating-gate technologies, is demonstrated as a reliable replacement to signal-processing tasks previously only solved by custom design. Living in an analog world demands the constant use and refinement of analog signal processing for the purpose of interfacing with digital systems. This work offers a comprehensive look at utilizing floating-gate transistors as the core element for analog signal-processing tasks. This work demonstrates the floating gate\u27s merit in large reconfigurable array-driven systems and in smaller-scale implementations, such as linearization techniques for oscillators and analog-to-digital converters. A study on analog floating-gate reliability is complemented with a temperature compensation scheme for implementing these systems in ever-changing, realistic environments
- …