Theoretical and Practical Validation of Combined BEM/FEM Substrate Resistance Modeling Abstract

In mixed-signal designs, substrate noise originating from the digital part can seriously influence the functionality of the analog part. As such, accurately modeling the properties of the substrate as a noise-propagator is becoming ever more important. A model can be obtained through the Finite Element Method (FEM) or the Boundary Element Method (BEM). The FEM performs a full 3D discretization of the substrate, which makes this method very accurate and flexible but also slow. The BEM only discretizes the contact areas on the boundary of the substrate, which makes it less flexible, but significantly faster. A combination between BEM and FEM can be efficient when we need flexibility and speed at the same time. This paper briefly describes the BEM and the FEM and their combination, but mainly concentrates on the theoretical validation of the combined method and the experimental verification through implementation in the SPACE layout to circuit extractor and comparison with commercial BEM and FEM tools.

SiGe/CMOS Millimeter-Wave Integrated Circuits and Wafer-Scale Packaging for Phased Array Systems.

Phased array systems have been used to achieve electronic beam control and fast beam scanning. In the RF-phase shifting architecture, T/R modules are required for each antenna element, and have been traditionally developed using GaAs or InP technology. This thesis demonstrates that Ka-band (35 GHz) T/R modules can also be developed using the SiGe BiCMOS technology. The designed circuit blocks include a low noise amplifier, a 4-bit phase shifter, a variable gain amplifier/attenuator, and SPDT switches. The Ka-band phase shifters are designed based on CMOS switch and miniature low-pass networks for a single-ended and differential applications, and result in 3-degree rms phase error at 35 GHz. The SiGe LNA results in a peak gain of 24 dB and a noise figure of 2.9-3.1 dB with 11 mW power consumption. The CMOS variablestep attenuator has 12-dB attenuation range (1 dB step) with very low loss and phase imbalance at 10-50 GHz. A variable gain LNA is also demonstrated at 30-40 GHz for the differential phased array receiver, and has 20-dB gain and <1-degree rms phase imbalance between the 8 different gain states and 10 dB gain control. All of these circuits show state-of-the-art performance, and the phase shifter, distributed attenuator and VGA are also first-time demonstrations at Ka-band frequencies. These circuit blocks were used in a miniature SiGe/CMOS Ka-band T/R module with a dimension of 0.93x1.33mm2, and a measured performance of 19 dB receive gain, 4-5 dB NF, 9 dB transmit gain and +5.5 dBm output P1dB. The T/R module also has 4-bit phase control and 10 dB gain control in both the transmit and receive modes. To our knowledge, this is the first demonstration of a Ka-band SiGe/CMOS T/R module to-date. Finally, a DC-110 GHz Si wafer-scale packaging technique has been developed using thermo-compression bonding and is suitable for Ka-band and even W-band T/R modules. The package transition has an insertion loss of 0.1-0.26 dB at 30-110 GHz, and the package resonances and leakage were drastically reduced by grounding the sealing ring. This is the first demonstration of a wideband resonance-free (DC-110 GHz) package using silicon technology.Ph.D.Electrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/58380/1/bmin_1.pd