Executing AADL models with UML/Marte

International audienceAADL and MARTE are two modeling formalisms supporting the analysis of real-time embedded systems. Since both cover similar aspects, a clear assessment of their respective strength and weakness is required. Building on previous works, we focus here on the time aspects of the two specifications. Relying on the MARTE Time Model and the operational semantics of its companion language CCSL we attempt to equipped UML activities with the execution semantics of an AADL specification. This is part of a much broader effort to build a generic simulator for UML models with the semantics explicitly defined within the model

MARTE: A Profile for RT/E Systems Modeling, Analysis (and Simulation?)

The original publication is available from ACM Digital Library (http://portal.acm.org/citation.cfm?id=1416222.1416271)International audienceAs its name promises, the Unified Modeling Language (UML) provides a collection of diagrammatic modeling styles. To the early class/objects and use-case diagrams were almost immediately added state-, activity-, collaboration-, and component diagrams. All these modeling views, required for structural and behavioral representations of systems, were then progressed to further detailed expressivity. Provision for domain- specific specializations was made under the form of profiles. Somehow this goal of being rather universal and extendible discarded the possibility of UML to adopt too strict and precise a semantics; as users were generally to define and refine it in their stereotyped profiles anyway. As a result, even the little execution semantics there is in the standard is often not considered in such specializations. We tackled the general issue of defining a broadly expressive Time Model as a sub-profile of the upcoming OMG Profile for Modeling and Analysis of Real-Time Embedded systems (MARTE), currently undergoing finalization at OMG. The goal is to provide a generic timed interpretation, on which timed models of computation and timed simulation semantics could be built inside the UML definition scope, instead of as part of the many external proprietary profiles. The MARTE time library can be used as the basis for the definition of a UML real-time simulator

Modeling of Immediate vs. Delayed Data Communications: from AADL to UML MARTE

The original publication is available at http://www.ecsi-association.org/ecsi/main.asp?l1=library&fn=def&id=265International audienceThe forthcoming OMG UML Profile for Modeling and Analysis of Real-Time Embedded systems (MARTE) aims, amongst other things, at providing a referential Time Model subprofile where semantic issues can be explicitly and formally described. As a full-size exercise we deal here with the modeling of immediate and delayed data communications in AADL. It actually reflects an important issue in RT/E model semantics: a propagation of immediate communications may result in a combinatorial loop, with ill-defined behavior; introduction of delays may introduce races, which have to be controlled. We describe here the abilities of MARTE in this respect

Natural Interpretation of UML/MARTE Diagrams for System Requirements Specification

International audienceTo verify embedded systems early in the design stages, we need formal ways to requirements specification which can be as close as possible to natural language interpretation, away from the lower ESL/RTL levels. This paper proposes to contribute to the FSL (Formal Specification Level) by specifying natural language requirements graphically in the form of temporal patterns. Standard modeling artifacts like UML and MARTE are used to provide formal semantics of these graphical models allowing to eliminate ambiguity in specifications and automatic design verification at different abstraction levels using these patterns

Modeling Time(s)

The original publication is available at www.springerlink.com (http://dx.doi.org/10.1007/978-3-540-75209-7_38)International audienceTime and timing features are an important aspect of modern electronic systems, often of embedded nature. We argue here that in early design phases, time is often of logical (rather than physical) nature, even possibly multiform. The compilation/synthesis of heterogeneous applications onto architecture platforms then largely amounts to adjusting the former logical time(s) demands onto the latter physical time abilities. Many distributed scheduling techniques pertain to this approach of “time refinement”. We provide extensive Time and Allocation metamodels that open the possibility to cast this approach in a Model-Driven Engineering light. We give a UML representation of these concepts through two subprofiles, parts of the foundations of the forthcoming OMG UML Profile for Modeling and Analysis of Real-Time and Embedded systems (MARTE). Time modeling also allows for a precise description of time-related entities and their associated timed properties

Multiform Time in UML for Real-time Embedded Applications

The original publication is available at ieee.org (http://dx.doi.org/10.1109/RTCSA.2007.51)International audienceEach domain has its own interpretation of time. We propose to extend UML, which is more and more used in the domain of real-time embedded applications, with a concept of time inherited from reactive system modeling : multiform time. After a brief review of some UML profiles, we present our extensions and we illustrate on an example from the automotive industry how to represent and to constraint behaviors depending on multiform time. We advocate that this model of time offers wider possibilities than restricting models only to the physical time

Semantic Multi-View model for Low-Power

5 pagesNational audiencePower is an important concern in embedded systems. Reduction of power consumption is achieved by balancing the control of multiple domains: switching power, reducing or increasing voltage and changing the frequency on system sections. Model-Driven Engineering gives tools to model the interactions of these domains. In this work, we propose to use MARTE combined to UPF concepts to capture the structure and behavior of these multiple domains. We adopt CCSL to unify the multiform aspects among domains and to verify their proper interaction. We provide an example to illustrate MARTE representation and a simulation of multi-domain power design, specified on CCSL and running on TIMESQUARE

A multiform time approach to real-time system modeling: Application to an automotive system

The original publication is available at ieee.org ({http://dx.doi.org/10.1109/SIES.2007.4297340)International audienceIn the context of an effort to answer the OMG RFP for Modeling and Analysis of Real-Time Embedded systems (MARTE), we are defining extensions to the simple time model of UML2. After a brief review of some time-related UML profiles, we focus on the specificity of our approach: the ability to take account of multiform time-a concept inherited from reactive system modeling. Using an example from the automotive industry, we illustrate the use of our profile to represent, to constraint and to analyze behaviors depending on multiform time

CCSL: specifying clock constraints with UML/MARTE

The original publication is available at www.springerlink.com.International audienceThe Object Management Group (OMG) Unified Modeling Manguage (UML) profile for Modeling and Analysis of Real-Time and Embedded systems (MARTE) aims at using the general-purpose modeling language UML in the domain of Real-Time and Embedded (RTE) systems. To achieve this goal, it is absolutely required to introduce inside the mainly untimed UML an unambiguous time structure which MARTE model elements can rely on to build precise models amenable to formal analysis. The MARTE Time model has defined such a structure. We have also defined a non-normative concrete syntax called the Clock Constraint Specification Language (CCSL) to demonstrate what can be done based on this structure. This paper gives a brief overview of this syntax and its formal semantics, and shows how existing UML model elements can be used to apply this syntax in a graphical way and benefit from the semantics

MARTE: A Profile for RT/E Systems Modeling, Analysis (and Simulation?)

The original publication is available from ACM Digital Library (http://portal.acm.org/citation.cfm?id=1416222.1416271)International audienceAs its name promises, the Unified Modeling Language (UML) provides a collection of diagrammatic modeling styles. To the early class/objects and use-case diagrams were almost immediately added state-, activity-, collaboration-, and component diagrams. All these modeling views, required for structural and behavioral representations of systems, were then progressed to further detailed expressivity. Provision for domain- specific specializations was made under the form of profiles. Somehow this goal of being rather universal and extendible discarded the possibility of UML to adopt too strict and precise a semantics; as users were generally to define and refine it in their stereotyped profiles anyway. As a result, even the little execution semantics there is in the standard is often not considered in such specializations. We tackled the general issue of defining a broadly expressive Time Model as a sub-profile of the upcoming OMG Profile for Modeling and Analysis of Real-Time Embedded systems (MARTE), currently undergoing finalization at OMG. The goal is to provide a generic timed interpretation, on which timed models of computation and timed simulation semantics could be built inside the UML definition scope, instead of as part of the many external proprietary profiles. The MARTE time library can be used as the basis for the definition of a UML real-time simulator