FPGA-based Anomalous trajectory detection using SOFM

A system for automatically classifying the trajectory of a moving object in a scene as usual or suspicious is presented. The system uses an unsupervised neural network (Self Organising Feature Map) fully implemented on a reconfigurable hardware architecture (Field Programmable Gate Array) to cluster trajectories acquired over a period, in order to detect novel ones. First order motion information, including first order moving average smoothing, is generated from the 2D image coordinates (trajectories). The classification is dynamic and achieved in real-time. The dynamic classifier is achieved using a SOFM and a probabilistic model. Experimental results show less than 15\% classification error, showing the robustness of our approach over others in literature and the speed-up over the use of conventional microprocessor as compared to the use of an off-the-shelf FPGA prototyping board

A case study for NoC based homogeneous MPSoC architectures

The many-core design paradigm requires flexible and modular hardware and software components to provide the required scalability to next-generation on-chip multiprocessor architectures. A multidisciplinary approach is necessary to consider all the interactions between the different components of the design. In this paper, a complete design methodology that tackles at once the aspects of system level modeling, hardware architecture, and programming model has been successfully used for the implementation of a multiprocessor network-on-chip (NoC)-based system, the NoCRay graphic accelerator. The design, based on 16 processors, after prototyping with field-programmable gate array (FPGA), has been laid out in 90-nm technology. Post-layout results show very low power, area, as well as 500 MHz of clock frequency. Results show that an array of small and simple processors outperform a single high-end general purpose processo

Towards a Scalable Hardware/Software Co-Design Platform for Real-time Pedestrian Tracking Based on a ZYNQ-7000 Device

Currently, most designers face a daunting task to research different design flows and learn the intricacies of specific software from various manufacturers in hardware/software co-design. An urgent need of creating a scalable hardware/software co-design platform has become a key strategic element for developing hardware/software integrated systems. In this paper, we propose a new design flow for building a scalable co-design platform on FPGA-based system-on-chip. We employ an integrated approach to implement a histogram oriented gradients (HOG) and a support vector machine (SVM) classification on a programmable device for pedestrian tracking. Not only was hardware resource analysis reported, but the precision and success rates of pedestrian tracking on nine open access image data sets are also analysed. Finally, our proposed design flow can be used for any real-time image processingrelated products on programmable ZYNQ-based embedded systems, which benefits from a reduced design time and provide a scalable solution for embedded image processing products

Kecerdasan matematik-logik dalam kalangan pelajar sarjana Pendidikan Teknik dan Vokasional UTHM

Kecerdasan matematik-logik sering dikaitkan dengan penguasaan pelajar dalam subjek matematik. Pencapaian pelajar, khususnya pelajar Sarjana Pendidikan Teknik dan Vokasional, Universiti Tun Hussein Onn Malaysia (UTHM) dalam kursus Statistik dalam Penyelidikan sedikit sebanyak mempengaruhi pencapaian akademik pelajar. Oleh itu, kajian ini dijalankan untuk mengkaji pengaruh kecerdasan matematik-logik terhadap pencapaian pelajar dalam kursus Statistik dalam Penyelidikan. Kajian berbentuk tinjauan secara kuantitatif untuk melihat hubungan diantara dua pembolehubah iaitu pembolehubah tidak bersandar (kecerdasan matematik-logik) dan pembolehubah bersandar (penguasaan pelajar dalam kursus Statistik dalam Penyelidikan). Persampelan rawak mudah digunakan dalam kajian ini dengan mengambil sampel seramai 108 orang pelajar Sarjana Pendidikan Teknik dan Vokasional sebagai responden kajian. Data diperoleh daripada sampel dengan menggunakan borang soal selidik yang diolah berdasarkan alat pengukuran kecerdasan MIDAS (Multiple Intelligence Development Assessment Scales). Data dianalisis menggunakan perisian SPSS (Statistical Package for Social Science) versi 16.0 yang melibatkan ujian statistik skor min dan kolerasi pangkat Spearman. Hasil dapatan kajian menunjukkan tahap kecenderungan kecerdasan matematik-logik pelajar berada pada tahap yang tinggi dan mempunyai hubungan yang signifikan dengan pencapaian pelajar dalam kursus Statistik dalam Penyelidikan. Berdasarkan dapatan kajian boleh disimpulkan bahawa kecerdasan matematik-logik dapat dijadikan kayu ukur dalam memastikan kejayaan pelajar

Overview of technologies for building robots in the classroom

This paper aims to give an overview of technologies that can be used to implement robotics within an educational context. We discuss complete robotics systems as well as projects that implement only certain elements of a robotics system, such as electronics, hardware, or software. We believe that Maker Movement and DIY trends offers many new opportunities for teaching and feel that they will become much more prominent in the future. Products and projects discussed in this paper are: Mindstorms, Vex, Arduino, Dwengo, Raspberry Pi, MakeBlock, OpenBeam, BitBeam, Scratch, Blockly and ArduBlock

Exploiting programmable architectures for WiFi/ZigBee inter-technology cooperation

The increasing complexity of wireless standards has shown that protocols cannot be designed once for all possible deployments, especially when unpredictable and mutating interference situations are present due to the coexistence of heterogeneous technologies. As such, flexibility and (re)programmability of wireless devices is crucial in the emerging scenarios of technology proliferation and unpredictable interference conditions. In this paper, we focus on the possibility to improve coexistence performance of WiFi and ZigBee networks by exploiting novel programmable architectures of wireless devices able to support run-time modifications of medium access operations. Differently from software-defined radio (SDR) platforms, in which every function is programmed from scratch, our programmable architectures are based on a clear decoupling between elementary commands (hard-coded into the devices) and programmable protocol logic (injected into the devices) according to which the commands execution is scheduled. Our contribution is two-fold: first, we designed and implemented a cross-technology time division multiple access (TDMA) scheme devised to provide a global synchronization signal and allocate alternating channel intervals to WiFi and ZigBee programmable nodes; second, we used the OMF control framework to define an interference detection and adaptation strategy that in principle could work in independent and autonomous networks. Experimental results prove the benefits of the envisioned solution