Test and Testability Techniques for Open Defects in RAM Address Decoders

It is a prevalent assumption that all RAM address decoder defects can be modelled as RAM array faults influencing one or more RAM cells. Therefore, can be implicitly detected by testing the RAM matrix with the march tests. Recently, we came across some failures in embedded SRAMs which were not detected by the march tests. The carried out analysis demonstrated the presence of open defects in address decoders that can not be modelled as the conventional coupling faults, therefore, are not detected by the march tests. In this article, we present the test and testability strategies for such hard-to-detect open defects. 1 Introduction Random Access Memories (RAMs) are often tested by carrying out so-called "March Tests" over all its addresses [1]. A march test consists of individual march elements. A march element traverses through all RAM addresses and performs a specified combination of read and write operations. For example, in a typical march element, each RAM address location is firs..