Teaching the design of a chip under the Cadence Opus environment using the Alliance cell libraries

International audienceShares experience of teaching the design of a chip under the Cadence Opus environment using the Alliance cell libraries. This course is taken by the students of the Master Degree in Integrated Circuits and CAD for VLSI of the University of Pierre et Marie Curie of Paris. The course, organized mainly as laboratory work, is intended to teach an industrial set of CAD tools for VLSI. During the first year this course has been given, the students helped actively in the work of parametrizing the Cadence Opus tools to permit the use of the Alliance libraries. Alliance is a set of CAD tools and portable libraries for VLSI developed at the laboratory and distributed freely all around the world. This work has given rise to a design kit for the Alliance libraries under Cadence Opus. The design kit allows one to design complete circuits under Cadence Opus. During the course the students used the design kit to design a complete AMD2901 chip from the Advanced Micro Devices company starting from its architecture specification. In this paper we discuss the Cadence Opus database, then we present the general design method using the Cadence Alliance design kit. We also investigate the portability of the Alliance libraries to Cadence Opus, and describe the use of Opus to design an example circuit. Before drawing a conclusion we will lay out the general plan of the course