23,232 research outputs found
On the Verification of a WiMax Design Using Symbolic Simulation
In top-down multi-level design methodologies, design descriptions at higher
levels of abstraction are incrementally refined to the final realizations.
Simulation based techniques have traditionally been used to verify that such
model refinements do not change the design functionality. Unfortunately, with
computer simulations it is not possible to completely check that a design
transformation is correct in a reasonable amount of time, as the number of test
patterns required to do so increase exponentially with the number of system
state variables. In this paper, we propose a methodology for the verification
of conformance of models generated at higher levels of abstraction in the
design process to the design specifications. We model the system behavior using
sequence of recurrence equations. We then use symbolic simulation together with
equivalence checking and property checking techniques for design verification.
Using our proposed method, we have verified the equivalence of three WiMax
system models at different levels of design abstraction, and the correctness of
various system properties on those models. Our symbolic modeling and
verification experiments show that the proposed verification methodology
provides performance advantage over its numerical counterpart.Comment: In Proceedings SCSS 2012, arXiv:1307.802
Formal Verification of Security Protocol Implementations: A Survey
Automated formal verification of security protocols has been mostly focused on analyzing high-level abstract models which, however, are significantly different from real protocol implementations written in programming languages. Recently, some researchers have started investigating techniques that bring automated formal proofs closer to real implementations. This paper surveys these attempts, focusing on approaches that target the application code that implements protocol logic, rather than the libraries that implement cryptography. According to these approaches, libraries are assumed to correctly implement some models. The aim is to derive formal proofs that, under this assumption, give assurance about the application code that implements the protocol logic. The two main approaches of model extraction and code generation are presented, along with the main techniques adopted for each approac
Software Model Checking with Explicit Scheduler and Symbolic Threads
In many practical application domains, the software is organized into a set
of threads, whose activation is exclusive and controlled by a cooperative
scheduling policy: threads execute, without any interruption, until they either
terminate or yield the control explicitly to the scheduler. The formal
verification of such software poses significant challenges. On the one side,
each thread may have infinite state space, and might call for abstraction. On
the other side, the scheduling policy is often important for correctness, and
an approach based on abstracting the scheduler may result in loss of precision
and false positives. Unfortunately, the translation of the problem into a
purely sequential software model checking problem turns out to be highly
inefficient for the available technologies. We propose a software model
checking technique that exploits the intrinsic structure of these programs.
Each thread is translated into a separate sequential program and explored
symbolically with lazy abstraction, while the overall verification is
orchestrated by the direct execution of the scheduler. The approach is
optimized by filtering the exploration of the scheduler with the integration of
partial-order reduction. The technique, called ESST (Explicit Scheduler,
Symbolic Threads) has been implemented and experimentally evaluated on a
significant set of benchmarks. The results demonstrate that ESST technique is
way more effective than software model checking applied to the sequentialized
programs, and that partial-order reduction can lead to further performance
improvements.Comment: 40 pages, 10 figures, accepted for publication in journal of logical
methods in computer scienc
Soft Contract Verification
Behavioral software contracts are a widely used mechanism for governing the
flow of values between components. However, run-time monitoring and enforcement
of contracts imposes significant overhead and delays discovery of faulty
components to run-time.
To overcome these issues, we present soft contract verification, which aims
to statically prove either complete or partial contract correctness of
components, written in an untyped, higher-order language with first-class
contracts. Our approach uses higher-order symbolic execution, leveraging
contracts as a source of symbolic values including unknown behavioral values,
and employs an updatable heap of contract invariants to reason about
flow-sensitive facts. We prove the symbolic execution soundly approximates the
dynamic semantics and that verified programs can't be blamed.
The approach is able to analyze first-class contracts, recursive data
structures, unknown functions, and control-flow-sensitive refinements of
values, which are all idiomatic in dynamic languages. It makes effective use of
an off-the-shelf solver to decide problems without heavy encodings. The
approach is competitive with a wide range of existing tools---including type
systems, flow analyzers, and model checkers---on their own benchmarks.Comment: ICFP '14, September 1-6, 2014, Gothenburg, Swede
Word-level Symbolic Trajectory Evaluation
Symbolic trajectory evaluation (STE) is a model checking technique that has
been successfully used to verify industrial designs. Existing implementations
of STE, however, reason at the level of bits, allowing signals to take values
in {0, 1, X}. This limits the amount of abstraction that can be achieved, and
presents inherent limitations to scaling. The main contribution of this paper
is to show how much more abstract lattices can be derived automatically from
RTL descriptions, and how a model checker for the general theory of STE
instantiated with such abstract lattices can be implemented in practice. This
gives us the first practical word-level STE engine, called STEWord. Experiments
on a set of designs similar to those used in industry show that STEWord scales
better than word-level BMC and also bit-level STE.Comment: 19 pages, 3 figures, 2 tables, full version of paper in International
Conference on Computer-Aided Verification (CAV) 201
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