2 research outputs found

    State assignment for FSM low power design

    No full text
    The paper concerns low power design of synchronous FSM and power estimation regarding a given input sequence. A novel and practical approach for state assignment is suggested by means of which the average rate of register switching is reduced. We achieved more realistic power estimates in comparison with the probabilitistic approach. Experimental results demonstrate the effectiveness of the proposed approach. (orig.)Available from TIB Hannover: RR 7263(96,2) / FIZ - Fachinformationszzentrum Karlsruhe / TIB - Technische InformationsbibliothekSIGLEDEGerman
    corecore