55,461 research outputs found

    Modeling and performance evaluation of stealthy false data injection attacks on smart grid in the presence of corrupted measurements

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    The false data injection (FDI) attack cannot be detected by the traditional anomaly detection techniques used in the energy system state estimators. In this paper, we demonstrate how FDI attacks can be constructed blindly, i.e., without system knowledge, including topological connectivity and line reactance information. Our analysis reveals that existing FDI attacks become detectable (consequently unsuccessful) by the state estimator if the data contains grossly corrupted measurements such as device malfunction and communication errors. The proposed sparse optimization based stealthy attacks construction strategy overcomes this limitation by separating the gross errors from the measurement matrix. Extensive theoretical modeling and experimental evaluation show that the proposed technique performs more stealthily (has less relative error) and efficiently (fast enough to maintain time requirement) compared to other methods on IEEE benchmark test systems.Comment: Keywords: Smart grid, False data injection, Blind attack, Principal component analysis (PCA), Journal of Computer and System Sciences, Elsevier, 201

    A Software-based Low-Jitter Servo Clock for Inexpensive Phasor Measurement Units

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    This paper presents the design and the implementation of a servo-clock (SC) for low-cost Phasor Measurement Units (PMUs). The SC relies on a classic Proportional Integral (PI) controller, which has been properly tuned to minimize the synchronization error due to the local oscillator triggering the on-board timer. The SC has been implemented into a PMU prototype developed within the OpenPMU project using a BeagleBone Black (BBB) board. The distinctive feature of the proposed solution is its ability to track an input Pulse-Per-Second (PPS) reference with good long-term stability and with no need for specific on-board synchronization circuitry. Indeed, the SC implementation relies only on one co-processor for real-time application and requires just an input PPS signal that could be distributed from a single substation clock
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