Specification and simulation of microprocessor operations and parallel instructions

In this paper, we report on the development of a language which is especially tailored to the specification and simulation of microprocessor operations and parallel instructions. The approach is rigorous, and it combines the naturalness and readability of the traditional pseudocode with the formality and rigour of instruction specifications in the programming language C (but without the disadvantages of the latter). The underlying semantic model has been formalized by the equations of an appropriate denotational semantic model. The specifications can be used for a variety of purposes, such as the generation of a data book and other on-line documentation, the generation of a simulator that allows functional testing of programs even before the hardware has been designed and implemented, and the generation of a test suite to perform functional tests of a given design or real chip

Specification and simulation of microprocessor operations and parallel instructions

In this paper, we report on the development of a language which is especially tailored to the specification and simulation of microprocessor operations and parallel instructions. The approach is rigorous, and it combines the naturalness and readability of the traditional pseudocode with the formality and rigour of instruction specifications in the programming language C (but without the disadvantages of the latter). The underlying semantic model has been formalized by the equations of an appropriate denotational semantic model. The specifications can be used for a variety of purposes, such as the generation of a data book and other on-line documentation, the generation of a simulator that allows functional testing of programs even before the hardware has been designed and implemented, and the generation of a test suite to perform functional tests of a given design or real chip