Software Platform based Embedded Multiprocessor SoC Prototyping

Abstract. This paper describes our experience in processor/threads synchronization using the POSIX API standard for MPSoC virtual applications prototyping. Spin-Lock (Binary Semaphore) implementations on general purpose CPU are based on an atomic read and (conditional) write of a shared variable. In modern multiprocessor implementations, these operations occur as dependent pairs of conditional instructions, such as load linked and store conditional. We present and discuss how a hardware semaphore could be a more efficient mechanism for processor/threads synchronisation that is CPU family independent. This mechanism has been implemented for an SMP Operating System with a validation on a top of a multi-ARM software platform