Sensitivity analysis of critical parameters in board test

Includes bibliographical references (page 63).The authors analyze the main contributors to the quality and cost of complex boards. With manufacturing data from Hewlett-Packard boards, they use simulation models to derive the sensitivity of quality and cost to the solder defect rate, the functional defect rate, and test coverage. They also give a simple cost estimate of implementing IEEE 1149.1 boundary scan on ASICs. Their new yield model, which accounts for solder defect clustering, provides highly accurate yield predictions