SOI digital CMOS VLSI -- a design perspective

Abstract|This paper reviews the recent advances of SOI for digital CMOS VLSI applications with particular emphasis on the design issues and advantages resulting from the unique SOI device structure. The technology/device requirements and design issues/challenges for high-performance, generalpurpose microprocessor applications are di erentiated with respect to low-power portable applications. Particular emphases are placed on the impact of oating-body in partiallydepleted devices on the circuit operation, stability, and functionality. Unique SOI design aspects such as parasitic bipolar e ect and hysteretic VT variation are addressed. Circuit techniques to improve the noise immunity and global design issues are discussed. 1