Improved Memoryless RNS Forward Converter Based on the Periodicity of Residues

The residue number system (RNS) is suitable for DSP architectures because of its ability to perform fast carry-free arithmetic. However, this advantage is over-shadowed by the complexity involved in the conversion of numbers between binary and RNS representations. Although the reverse conversion (RNS to binary) is more complex, the forward transformation is not simple either. Most forward converters make use of look-up tables (memory). Recently, a memoryless forward converter architecture for arbitrary moduli sets was proposed by Premkumar in 2002. In this paper, we present an extension to that architecture which results in 44% less hardware for parallel conversion and achieves 43% improvement in speed for serial conversions. It makes use of the periodicity properties of residues obtained using modular exponentiation

Design of reverse converters for the multi-moduli residue number systems with moduli of forms 2a, 2b - 1, 2c + 1

Residue number system (RNS) is a non-weighted integer number representation system that is capable of supporting parallel, carry-free and high speed arithmetic. This system is error-resilient and facilitates error detection, error correction and fault tolerance in digital systems. It finds applications in Digital Signal Processing (DSP) intensive computations like digital filtering, convolution, correlation, Discrete Fourier Transform, Fast Fourier Transform, etc. The basis for an RNS system is a moduli set consisting of relatively prime integers. Proper selection of this moduli set plays a significant role in RNS design because the speed of internal RNS arithmetic circuits as well as the speed and complexity of the residue to binary converter (R/B or Reverse Converter) have a large dependency on the form and number of the selected moduli. Moduli of forms 2a, 2b- 1, 2c + 1 (a, b and c are natural numbers) have the most use in RNS moduli sets as these moduli can be efficiently implemented using usual binary hardware that lead to simple design. Another important consideration for the reverse converter design is the selection of an appropriate conversion algorithm from Chinese Remainder Theorem (CRT), Mixed Radix Conversion (MRC) and the new Chinese Remainder Theorems (New CRT I and New CRT II). This research is focused on designing reverse converters for the multi-moduli RNS sets especially four and five moduli sets with moduli of forms 2a, 2b- 1, 2c + 1 . The residue to binary converters are designed by applying the above conversion algorithms in different possible ways and facilitating the use of modulo (2k) and modulo (2k – 1) adders that lead to simple design of adder based architectures and VLSI efficient implementations (k is a natural number). The area and delay of the proposed converters is analyzed and an efficient reverse converter is suggested from each of the various four and five moduli set converters for a given dynamic range

Adder Based Residue to Binary Number Converters for (2n - 1; 2n; 2n + 1)

Copyright © 2002 IEEEBased on an algorithm derived from the new Chinese remainder theorem I, we present three new residue-to-binary converters for the residue number system (2n-1, 2n, 2n+1) designed using 2n-bit or n-bit adders with improvements on speed, area, or dynamic range compared with various previous converters. The 2n-bit adder based converter is faster and requires about half the hardware required by previous methods. For n-bit adder-based implementations, one new converter is twice as fast as the previous method using a similar amount of hardware, whereas another new converter achieves improvement in either speed, area, or dynamic range compared with previous convertersYuke Wang, Xiaoyu Song, Mostapha Aboulhamid and Hong She

A Novel Cyclic Time to Digital Converter Based on Triple-Slope Interpolation and Time Amplification

This paper investigates a novel cyclic time-to-digital converter (TDC) which employs triple-slope analog interpolation and time amplification techniques for digitizing the time interval between the rising edges of two input signals(Start and Stop). The proposed converter will be a 9-bit cyclic time-to-digital converter that does not use delay lines in its structure. Therefore, it has a low sensitivity to temperature, power supply and process (PVT) variations. The other advantages of the proposed converter are low circuit complexity, and high accuracy compared with the time-to-digital converters that have previously been proposed. Also, this converter improves the time resolution and the dynamic range. In the same resolution, linear range and dynamic range, the proposed cyclic TDC reduces the number of circuit elements compared with the converters that have a similar circuit structure. Thus, the converter reduces the chip area, the power consumption and the figure of merit (FoM). In this converter, the integral nonlinearity (INL) and differential nonlinearity (DNL) errors are reduced. In order to evaluate the idea, the proposed time-to-digital converter is designed in TSMC 45 nm CMOS technology and simulated. Comparison of the theoretical and simulation results confirms the benefits of the proposed TDC

Quantum state conversion between continuous variable and qubits systems

We investigate how quantum state can be converted between continuous variable and qubits systems. Non-linear Jaynes-Cumings interaction Hamiltonian is introduced to accomplish the conversion. Detail analysis on the conversion of thermal state exhibits that pretty good fidelity can be achieved.Comment: 6 page

Integrity of H1 helix in prion protein revealed by molecular dynamic simulations to be especially vulnerable to changes in the relative orientation of H1 and its S1 flank

In the template-assistance model, normal prion protein (PrPC), the pathogenic cause of prion diseases such as Creutzfeldt-Jakob (CJD) in human, Bovine Spongiform Encephalopathy (BSE) in cow, and scrapie in sheep, converts to infectious prion (PrPSc) through an autocatalytic process triggered by a transient interaction between PrPC and PrPSc. Conventional studies suggest the S1-H1-S2 region in PrPC to be the template of S1-S2 $\beta$-sheet in PrPSc, and the conformational conversion of PrPC into PrPSc may involve an unfolding of H1 in PrPC and its refolding into the $\beta$-sheet in PrPSc. Here we conduct a series of simulation experiments to test the idea of transient interaction of the template-assistance model. We find that the integrity of H1 in PrPC is vulnerable to a transient interaction that alters the native dihedral angles at residue Asn$^{143}$, which connects the S1 flank to H1, but not to interactions that alter the internal structure of the S1 flank, nor to those that alter the relative orientation between H1 and the S2 flank.Comment: A major revision on statistical analysis method has been made. The paper now has 23 pages, 11 figures. This work was presented at 2006 APS March meeting session K29.0004 at Baltimore, MD, USA 3/13-17, 2006. This paper has been accepted for pubcliation in European Biophysical Journal on Feb 2, 200

COMPLEX DIGITAL SIGNAL PROCESSING USING QUADRATIC RESIDUE NUMBER SYSTEMS.

This work presents the development of complex digital signal processing algorithms using number theoretic techniques. Residue number principles and techniques are applied to process complex signal information in Finite Impulse Response (FIR) and Infinite Impulse Response (IIR) digital filters. Residue coding of complex samples and arithmetic for processing complex data have been presented using principles of quadratic residues in the Residue Number System (RNS). In this work, we have presented modifications to the Quadratic Residue Number System (QRNS), which we have termed the Modified Quadratic Residue Number System (MQRNS), to process complex integers. New results and theorems have been obtained for the selection of operators to code complex integers into the new MQRNS representation. A novel scheme for residue to binary conversion has been presented for implementation using both the QRNS and MQRNS. Hardware implementations of multiplication intensive complex nonrecursive and recursive digital filters have been presented where the QRNS and MQRNS structures are realized using a bit-slice architectural approach. The computation of Complex Number Theoretic Transforms (CNTTs) and the hardware implementation of a radix-2 NTT butterfly structure, using high density ROM arrays, are presented in both the QRNS and MQRNS systems. As an illustration, the computation of the CNTT developed in this work, is used to compute Cyclic Convolution for complex sequences. These results are verified by computer programs. The recursive FIR filter structure for uniformly spaced frequency samples on the unit circle developed by adapting the Complex Number Theoretic z-transform, has been implemented using the QRNS and MQRNS. In this work, the filter structure is extended for non-uniformly spaced frequency samples and has been termed the generalized number theoretic filter structure. It is shown that for the implementation of this generalized structure, the MQRNS is more efficient than the conventional RNS; the QRNS does not support appropriate fields for the generalized structure.Dept. of Electrical and Computer Engineering. Paper copy at Leddy Library: Theses & Major Papers - Basement, West Bldg. / Call Number: Thesis1985 .K757. Source: Dissertation Abstracts International, Volume: 46-08, Section: B, page: 2757. Thesis (Ph.D.)--University of Windsor (Canada), 1985