Register Allocation for Common Subexpressions in DSP Data Paths

| This paper presents a new code optimization technique for DSPs with irregular data path structures. We consider the problem of generating machine code for data ow graphs with common subexpressions (CSEs). While in previous work CSEs are supposed to be strictly stored in memory, the technique proposed in this paper also permits the allocation of special purpose registers for temporarily storing CSEs. As a result, both the code size and the number of memory accesses are reduced. The optimization is controlled by a simulated annealing algorithm. We demonstrate its eectiveness for several DSP applications and a widespread DSP processor. 1 I. Introduction More and more embedded systems with DSP functionality are based on programmable DSP processors. While a processor based design style benets from high exibility and opportunities for reuse, software development for DSPs still suers from the fact, that there is no adequate tool support by C compilers. Since DSPs are tuned for comput..