A highly efficient receiver for satellite-based Automatic Identification System signal detection

An innovative receiver architecture for the satellitebased Automatic Identification System (AIS) has been recently proposed. In this paper, we describe a few modifications that can be introduced on the algorithms for synchronization and detection, that provide an impressive performance improvement with respect to the previous system. The receiver architecture has been designed for an on-board implementation, and for this reason all algorithms have been realized keeping the complexity as low as possible. A prototype for the proposed receiver has been implemented by the University of Parma and CGS S.p.A. Compagnia Generale per 10 Spazio under the ESA project FENICE

A highly efficient receiver for satellite-based automatic identification system signal detection

An innovative receiver architecture for the satellite-based automatic identification system has been recently proposed. In this paper, we describe a few modifications that can be introduced on the algorithms for synchronization and detection, which provide an impressive performance improvement. The receiver architecture has been designed for an on-board implementation, and a prototype has been implemented by the University of Parma and CGS S.p.A. Compagnia Generale per lo Spazio under the European Space Agency project FENICE (Flexible innovative AIS receiver prototype). A few modifications are also here described that could allow a further performance improvement in case of processing moved to ground-based stations, based on a priori information there available

Reduced-complexity detection and phase synchronization of CPM signals

Based on an extension of Laurent (1986) decomposition of continuous phase modulation (CPM) signals into a sum of linearly modulated components, we derive a class of reduced-complexity maximum-likelihood (ML) coherent detection and closed-loop phase synchronization schemes. The complexity of the resulting detection schemes, expressed in terms of the number of matched filters and states of a Viterbi algorithm, is significantly reduced with respect to that of optimal coherent receivers with negligible performance loss. This result extends a known one valid for the binary case to multilevel CPM. The proposed synchronization schemes do not require an increased number of matched filters, and are perfectly suitable to be used in conjunction with these receivers. Based on the phase-locked loop (PLL) equivalent linear model, a method for optimizing the parameters of digital second-order PLL's is presented. Numerical examples, based on theoretical analysis and computer simulation, are provided for two specific formats in the CPM class: tamed frequency modulation (TFM) and a quaternary raised-cosine (RC) modulation