1,060 research outputs found
Design and Analysis of Time-Invariant SC-LDPC Convolutional Codes With Small Constraint Length
In this paper, we deal with time-invariant spatially coupled low-density
parity-check convolutional codes (SC-LDPC-CCs). Classic design approaches
usually start from quasi-cyclic low-density parity-check (QC-LDPC) block codes
and exploit suitable unwrapping procedures to obtain SC-LDPC-CCs. We show that
the direct design of the SC-LDPC-CCs syndrome former matrix or, equivalently,
the symbolic parity-check matrix, leads to codes with smaller syndrome former
constraint lengths with respect to the best solutions available in the
literature. We provide theoretical lower bounds on the syndrome former
constraint length for the most relevant families of SC-LDPC-CCs, under
constraints on the minimum length of cycles in their Tanner graphs. We also
propose new code design techniques that approach or achieve such theoretical
limits.Comment: 30 pages, 5 figures, accepted for publication in IEEE Transactions on
Communication
A 2.0 Gb/s Throughput Decoder for QC-LDPC Convolutional Codes
This paper propose a decoder architecture for low-density parity-check
convolutional code (LDPCCC). Specifically, the LDPCCC is derived from a
quasi-cyclic (QC) LDPC block code. By making use of the quasi-cyclic structure,
the proposed LDPCCC decoder adopts a dynamic message storage in the memory and
uses a simple address controller. The decoder efficiently combines the memories
in the pipelining processors into a large memory block so as to take advantage
of the data-width of the embedded memory in a modern field-programmable gate
array (FPGA). A rate-5/6 QC-LDPCCC has been implemented on an Altera Stratix
FPGA. It achieves up to 2.0 Gb/s throughput with a clock frequency of 100 MHz.
Moreover, the decoder displays an excellent error performance of lower than
at a bit-energy-to-noise-power-spectral-density ratio () of
3.55 dB.Comment: accepted to IEEE Transactions on Circuits and Systems
Quasi-Cyclic Asymptotically Regular LDPC Codes
Families of "asymptotically regular" LDPC block code ensembles can be formed
by terminating (J,K)-regular protograph-based LDPC convolutional codes. By
varying the termination length, we obtain a large selection of LDPC block code
ensembles with varying code rates, minimum distance that grows linearly with
block length, and capacity approaching iterative decoding thresholds, despite
the fact that the terminated ensembles are almost regular. In this paper, we
investigate the properties of the quasi-cyclic (QC) members of such an
ensemble. We show that an upper bound on the minimum Hamming distance of
members of the QC sub-ensemble can be improved by careful choice of the
component protographs used in the code construction. Further, we show that the
upper bound on the minimum distance can be improved by using arrays of
circulants in a graph cover of the protograph.Comment: To be presented at the 2010 IEEE Information Theory Workshop, Dublin,
Irelan
Deriving Good LDPC Convolutional Codes from LDPC Block Codes
Low-density parity-check (LDPC) convolutional codes are capable of achieving
excellent performance with low encoding and decoding complexity. In this paper
we discuss several graph-cover-based methods for deriving families of
time-invariant and time-varying LDPC convolutional codes from LDPC block codes
and show how earlier proposed LDPC convolutional code constructions can be
presented within this framework. Some of the constructed convolutional codes
significantly outperform the underlying LDPC block codes. We investigate some
possible reasons for this "convolutional gain," and we also discuss the ---
mostly moderate --- decoder cost increase that is incurred by going from LDPC
block to LDPC convolutional codes.Comment: Submitted to IEEE Transactions on Information Theory, April 2010;
revised August 2010, revised November 2010 (essentially final version).
(Besides many small changes, the first and second revised versions contain
corrected entries in Tables I and II.
Array Convolutional Low-Density Parity-Check Codes
This paper presents a design technique for obtaining regular time-invariant
low-density parity-check convolutional (RTI-LDPCC) codes with low complexity
and good performance. We start from previous approaches which unwrap a
low-density parity-check (LDPC) block code into an RTI-LDPCC code, and we
obtain a new method to design RTI-LDPCC codes with better performance and
shorter constraint length. Differently from previous techniques, we start the
design from an array LDPC block code. We show that, for codes with high rate, a
performance gain and a reduction in the constraint length are achieved with
respect to previous proposals. Additionally, an increase in the minimum
distance is observed.Comment: 4 pages, 2 figures, accepted for publication in IEEE Communications
Letter
Variations of the McEliece Cryptosystem
Two variations of the McEliece cryptosystem are presented. The first one is
based on a relaxation of the column permutation in the classical McEliece
scrambling process. This is done in such a way that the Hamming weight of the
error, added in the encryption process, can be controlled so that efficient
decryption remains possible. The second variation is based on the use of
spatially coupled moderate-density parity-check codes as secret codes. These
codes are known for their excellent error-correction performance and allow for
a relatively low key size in the cryptosystem. For both variants the security
with respect to known attacks is discussed
Compact QC-LDPC Block and SC-LDPC Convolutional Codes for Low-Latency Communications
Low decoding latency and complexity are two important requirements of channel
codes used in many applications, like machine-to-machine communications. In
this paper, we show how these requirements can be fulfilled by using some
special quasi-cyclic low-density parity-check block codes and spatially coupled
low-density parity-check convolutional codes that we denote as compact. They
are defined by parity-check matrices designed according to a recent approach
based on sequentially multiplied columns. This method allows obtaining codes
with girth up to 12. Many numerical examples of practical codes are provided.Comment: 5 pages, 1 figure, presented at IEEE PIMRC 201
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