Design of Asynchronous Viterbi Decoder using Bundled Data Protocol for Low Power Consumption

Abstract: This paper proposes a review on the designing of Asynchronous Viterbi Decoder. In order to reduce the power consumption and increase the speed, it is necessary to design Asynchronous Viterbi Decoder. Therefore, the aim is to design Asynchronous Viterbi Decoder by using handshaking protocol. This paper focuses on Bundled data protocol to design Asynchronous Viterbi Decoder. This paper also describes study of various units of Viterbi decoder. Viterbi decoders employed in digital wireless communications are complex and dissipiate large power. Asynchronous Viterbi Decoder have significant role in terms of performance because they saves power through not having to generate or distribute a global clock. Instead, timing between blocks is performed by local handshake signals. Asynchronous Viterbi decoders are used in wide range of applications i.e. in Wireless Communications, Digital Television broadcast, Largest applications in cell phones, Pattern recognition, Speech recognition CD ROMS and Magnetic disks etc. In Mobile station Baseband Modem, Viterbi Decoder consumes more than One-third of chip area and power dissipation of the baseband modem. Power efficiency can be increased if total power dissipation is decreased. Battery operated systems required Low power consumption. Asynchronous designs are inherently data driven and are active only when doing useful work, enabling significant savings in power and operating at the average speed of all components