Tensor Computation: A New Framework for High-Dimensional Problems in EDA

Many critical EDA problems suffer from the curse of dimensionality, i.e. the very fast-scaling computational burden produced by large number of parameters and/or unknown variables. This phenomenon may be caused by multiple spatial or temporal factors (e.g. 3-D field solvers discretizations and multi-rate circuit simulation), nonlinearity of devices and circuits, large number of design or optimization parameters (e.g. full-chip routing/placement and circuit sizing), or extensive process variations (e.g. variability/reliability analysis and design for manufacturability). The computational challenges generated by such high dimensional problems are generally hard to handle efficiently with traditional EDA core algorithms that are based on matrix and vector computation. This paper presents "tensor computation" as an alternative general framework for the development of efficient EDA algorithms and tools. A tensor is a high-dimensional generalization of a matrix and a vector, and is a natural choice for both storing and solving efficiently high-dimensional EDA problems. This paper gives a basic tutorial on tensors, demonstrates some recent examples of EDA applications (e.g., nonlinear circuit modeling and high-dimensional uncertainty quantification), and suggests further open EDA problems where the use of tensor computation could be of advantage.Comment: 14 figures. Accepted by IEEE Trans. CAD of Integrated Circuits and System

Worst-Case Analysis of Electrical and Electronic Equipment via Affine Arithmetic

In the design and fabrication process of electronic equipment, there are many unkown parameters which significantly affect the product performance. Some uncertainties are due to manufacturing process fluctuations, while others due to the environment such as operating temperature, voltage, and various ambient aging stressors. It is desirable to consider these uncertainties to ensure product performance, improve yield, and reduce design cost. Since direct electromagnetic compatibility measurements impact on both cost and time-to-market, there has been a growing demand for the availability of tools enabling the simulation of electrical and electronic equipment with the inclusion of the effects of system uncertainties. In this framework, the assessment of device response is no longer regarded as deterministic but as a random process. It is traditionally analyzed using the Monte Carlo or other sampling-based methods. The drawback of the above methods is large number of required samples to converge, which are time-consuming for practical applications. As an alternative, the inherent worst-case approaches such as interval analysis directly provide an estimation of the true bounds of the responses. However, such approaches might provide unnecessarily strict margins, which are very unlikely to occur. A recent technique, affine arithmetic, advances the interval based methods by means of handling correlated intervals. However, it still leads to over-conservatism due to the inability of considering probability information. The objective of this thesis is to improve the accuracy of the affine arithmetic and broaden its application in frequency-domain analysis. We first extend the existing literature results to the efficient time-domain analysis of lumped circuits considering the uncertainties. Then we provide an extension of the basic affine arithmetic to the frequency-domain simulation of circuits. Classical tools for circuit analysis are used within a modified affine framework accounting for complex algebra and uncertainty interval partitioning for the accurate and efficient computation of the worst case bounds of the responses of both lumped and distributed circuits. The performance of the proposed approach is investigated through extensive simulations in several case studies. The simulation results are compared with the Monte Carlo method in terms of both simulation time and accuracy

Spontaneous dressed-state polarization in the strong driving regime of cavity QED

We utilize high-bandwidth phase quadrature homodyne measurement of the light transmitted through a Fabry-Perot cavity, driven strongly and on resonance, to detect excess phase noise induced by a single intracavity atom. We analyze the correlation properties and driving-strength dependence of the atom-induced phase noise to establish that it corresponds to the long-predicted phenomenon of spontaneous dressed-state polarization. Our experiment thus provides a demonstration of cavity quantum electrodynamics in the strong driving regime, in which one atom interacts strongly with a many-photon cavity field to produce novel quantum stochastic behavior.Comment: 4 pages, 4 color figure

Double-Free-Layer Stochastic Magnetic Tunnel Junctions with Synthetic Antiferromagnets

Stochastic magnetic tunnel junctions (sMTJ) using low-barrier nanomagnets have shown promise as fast, energy-efficient, and scalable building blocks for probabilistic computing. Despite recent experimental and theoretical progress, sMTJs exhibiting the ideal characteristics necessary for probabilistic bits (p-bit) are still lacking. Ideally, the sMTJs should have (a) voltage bias independence preventing read disturbance (b) uniform randomness in the magnetization angle between the free layers, and (c) fast fluctuations without requiring external magnetic fields while being robust to magnetic field perturbations. Here, we propose a new design satisfying all of these requirements, using double-free-layer sMTJs with synthetic antiferromagnets (SAF). We evaluate the proposed sMTJ design with experimentally benchmarked spin-circuit models accounting for transport physics, coupled with the stochastic Landau-Lifshitz-Gilbert equation for magnetization dynamics. We find that the use of low-barrier SAF layers reduces dipolar coupling, achieving uncorrelated fluctuations at zero-magnetic field surviving up to diameters exceeding ($D\approx 100$ nm) if the nanomagnets can be made thin enough ($\approx 1$-$2$ nm). The double-free-layer structure retains bias-independence and the circular nature of the nanomagnets provides near-uniform randomness with fast fluctuations. Combining our full sMTJ model with advanced transistor models, we estimate the energy to generate a random bit as $\approx$ 3.6 fJ, with fluctuation rates of $\approx$ 3.3 GHz per p-bit. Our results will guide the experimental development of superior stochastic magnetic tunnel junctions for large-scale and energy-efficient probabilistic computation for problems relevant to machine learning and artificial intelligence

Design and Implementation of Area and Power Efficient Low Power VLSI Circuits through Simple Byte Compression with Encoding Technique

Transition activity is one of the major factors for power dissipation in Low power VLSI circuits due to charging and discharging of internal node capacitances. Power dissipation is reduced through minimizing the transition activity by using proper coding techniques. In this paper Multi coding technique is implemented to reduce the transition activity up to 58.26%. Speed of data transmission basically depends on the number of bits transmitted through bus. When handling data for large applications huge storage space is required for processing, storing and transferring information. Data compression is an algorithm to reduce the number of bits required to represent information in a compact form. Here simple byte compression technique is implemented to achieve a lossless data compression. This compression algorithm also reduces the encoder computational complexity when handling huge bits of information. Simple byte compression technique improves the compression ratio up to 62.5%. As a cumulative effort of Simple byte compression with Multi coding techniques minimize area and power dissipation in low power VLSI circuits