2,036 research outputs found

    Automated routing and control of silicon photonic switch fabrics

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    Automatic reconfiguration and feedback controlled routing is demonstrated in an 8×8 silicon photonic switch fabric based on Mach-Zehnder interferometers. The use of non-invasive Contactless Integrated Photonic Probes (CLIPPs) enables real-time monitoring of the state of each switching element individually. Local monitoring provides direct information on the routing path, allowing an easy sequential tuning and feedback controlled stabilization of the individual switching elements, thus making the switch fabric robust against thermal crosstalk, even in the absence of a cooling system for the silicon chip. Up to 24 CLIPPs are interrogated by a multichannel integrated ASIC wire-bonded to the photonic chip. Optical routing is demonstrated on simultaneous WDM input signals that are labelled directly on-chip by suitable pilot tones without affecting the quality of the signals. Neither preliminary circuit calibration nor lookup tables are required, being the proposed control scheme inherently insensible to channels power fluctuations

    Automatic Tuning of Silicon Photonics Millimeter-Wave Transceivers Building Blocks

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    Today, continuously growing wireless traffic have guided the progress in the wireless communication systems. Now, evolution towards next generation (5G) wireless communication systems are actively researched to accommodate expanding future data traffic. As one of the most promising candidates, integrating photonic devices in to the existing wireless system is considered to improve the performance of the systems. Emerging silicon photonic integrated circuits lead this integration more practically, and open new possibilities to the future communication systems. In this dissertation, the development of the electrical wireless communication systems are briefly explained. Also, development of the microwave photonics and silicon photonics are described to understand the possibility of the hybrid SiP integrated wireless communication systems. A limitation of the current electrical wireless systems are addressed, and hybrid integrated mm-wave silicon photonic receiver, and silicon photonic beamforming transmitter are proposed and analyzed in system level. In the proposed mm-wave silicon photonic receiver has 4th order pole-zero silicon photonic filter in the system. Photonic devices are vulnerable to the process and temperature variations. It requires manual calibration, which is expensive, time consuming, and prone to human errors. Therefore, precise automatic calibration solution with modified silicon photonic filter structure is proposed and demonstrated. This dissertation demonstrates fully automatic tuning of silicon photonic all-pass filter (APF)-based pole/zero filters using a monitor-based tuning method that calibrates the initial response by controlling each pole and zero individually via micro-heaters. The proposed tuning approach calibrates severely degraded initial responses to the designed elliptic filter shapes and allows for automatic bandwidth and center frequency reconfiguration of these filters. This algorithm is demonstrated on 2nd- and 4th-order filters fabricated in a standard silicon photonics foundry process. After the initial calibration, only 300ms is required to reconfigure a filter to a different center frequency. Thermal crosstalk between the micro-heaters is investigated, with substrate thinning demonstrated to suppress this effect and reduce filter calibration to less than half of the original thick substrate times. This fully automatic tuning approach opens the possibility of employing silicon photonic filters in real communication systems. Also, in the proposed beamforming transmitter, true-time delay ring resonator based 1x4 beamforming network is imbedded. A proposed monitor-based tuning method compensates fabrication variations and thermal crosstalk by controlling micro-heaters individually using electrical monitors. The proposed tuning approach successfully demonstrated calibration of OBFN from severely degraded initial responses to well-defined group delay response required for the targeted radiating angle with a range of 60◦ (-30◦ to 30◦ ) in a linear beamforming antenna array. This algorithm is demonstrated on OBFN fabricated in a standard silicon photonics foundry process. The calibrated OBFN operates at 30GHz and provide 2GHz bandwidth. This fully automatic tuning approach opens the possibility of employing silicon OBFN in real wideband mm-wave wireless communication systems by providing robust operating solutions. All the proposed photonic circuits are implemented using the standard silicon photonic technologies, and resulted in several publications in IEEE/OSA Journals and Conferences

    A mixed-signal early vision chip with embedded image and programming memories and digital I/O

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    From a system level perspective, this paper presents a 128 × 128 flexible and reconfigurable Focal-Plane Analog Programmable Array Processor, which has been designed as a single chip in a 0.35μm standard digital 1P-5M CMOS technology. The core processing array has been designed to achieve high-speed of operation and large-enough accuracy (∼ 7bit) with low power consumption. The chip includes on-chip program memory to allow for the execution of complex, sequential and/or bifurcation flow image processing algorithms. It also includes the structures and circuits needed to guarantee its embedding into conventional digital hosting systems: external data interchange and control are completely digital. The chip contains close to four million transistors, 90% of them working in analog mode. The chip features up to 330GOPs (Giga Operations per second), and uses the power supply (180GOP/Joule) and the silicon area (3.8 GOPS/mm2) efficiently, as it is able to maintain VGA processing throughputs of 100Frames/s with about 15 basic image processing tasks on each frame

    Thermal Aware Design Method for VCSEL-Based On-Chip Optical Interconnect

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    Optical Network-on-Chip (ONoC) is an emerging technology considered as one of the key solutions for future generation on-chip interconnects. However, silicon photonic devices in ONoC are highly sensitive to temperature variation, which leads to a lower efficiency of Vertical-Cavity Surface-Emitting Lasers (VCSELs), a resonant wavelength shift of Microring Resonators (MR), and results in a lower Signal to Noise Ratio (SNR). In this paper, we propose a methodology enabling thermal-aware design for optical interconnects relying on CMOS-compatible VCSEL. Thermal simulations allow designing ONoC interfaces with low gradient temperature and analytical models allow evaluating the SNR.Comment: IEEE International Conference on Design Automation and Test in Europe (DATE 2015), Mar 2015, Grenoble, France. 201

    Automated routing and control of silicon photonic switch fabrics

    Get PDF
    Automatic reconfiguration and feedback controlled routing is demonstrated in an 8×8 silicon photonic switch fabric based on Mach-Zehnder interferometers. The use of non-invasive Contactless Integrated Photonic Probes (CLIPPs) enables realtime monitoring of the state of each switching element individually. Local monitoring provides direct information on the routing path, allowing an easy sequential tuning and feedback controlled stabilization of the individual switching elements, thus making the switch fabric robust against thermal crosstalk, even in the absence of a cooling system for the silicon chip. Up to 24 CLIPPs are interrogated by a multichannel integrated ASIC wirebonded to the photonic chip. Optical routing is demonstrated on simultaneous WDM input signals that are labelled directly on-chip by suitable pilot tones without affecting the quality of the signals. Neither preliminary circuit calibration nor lookup tables are required, being the proposed control scheme inherently insensible to channels power fluctuations

    Design of Reconfigurable On-Chip Optical Architectures based on Phase Change Material

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    Integrated optics is a promising technology to take the advantage of light propagation for high throughput chip-scale computing architectures and interconnects. Optical devices call for reconfigurable architectures to maximize resource utilization. Typical reconfigurable optical computing architectures involve micro-ring resonators for electro-optic modulation. However, such devices require voltage and thermal tuning to compensate for fabrication process variability and thermal sensitivity. To tackle this challenge we propose to use non-volatile Phase Change Material (PCM) to configure optical path. The non-volatility of PCM elements allows maintaining the optical path without consuming energy and the high contrast between two state of crystalline (cr) and amorphous (am) allows to route signal only through the required resonators, thus saving the calibration energy of bypassed resonators. We evaluate the efficiency of PCM based design on Reconfigurable Directed Logic (RDL) and nanophotonic interconnect. We develop a model allowing to estimate optical and electrical energy consumption. In the context of nanophotonic interconnect we evaluate the efficiency of the proposed PCM-based interconnects using system level simulations carried out with SNIPER manycore simulator. Results show that the proposed implementation allows reducing the static power by 53% on average for RDL and communication power saving up to 52% is achieved for nanophotonic interconnect

    Architectures for Wireless Sensor Networks

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    Various architectures have been developed for wireless sensor networks. Many of them leave to the programmer important concepts as the way in which the inter-task communication and dynamic reconfigurations are addressed. In this paper we describe the characteristics of a new architecture we proposed - the data-centric architecture. This architecture offers an easy way of structuring the applications designed for wireless sensor nodes that confers them superior performances

    Nanomechanical single-photon routing

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    The merger between integrated photonics and quantum optics promises new opportunities within photonic quantum technology with the very significant progress on excellent photon-emitter interfaces and advanced optical circuits. A key missing functionality is rapid circuitry reconfigurability that ultimately does not introduce loss or emitter decoherence, and operating at a speed matching the photon generation and quantum memory storage time of the on-chip quantum emitter. This ambitious goal requires entirely new active quantum-photonic devices by extending the traditional approaches to reconfigurability. Here, by merging nano-optomechanics and deterministic photon-emitter interfaces we demonstrate on-chip single-photon routing with low loss, small device footprint, and an intrinsic time response approaching the spin coherence time of solid-state quantum emitters. The device is an essential building block for constructing advanced quantum photonic architectures on-chip, towards, e.g., coherent multi-photon sources, deterministic photon-photon quantum gates, quantum repeater nodes, or scalable quantum networks.Comment: 7 pages, 3 figures, supplementary informatio
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