Polar Code decoder exploration framework

The increasing demand for fast wireless communications requires sophisticated baseband signal processing. One of the computational intense tasks here is advanced Forward Error Correction (FEC), especially the decoding. Finding efficient hardware implementations for sophisticated FEC decoding algorithms that fulfill throughput demands under strict implementation constraints is an active research topic due to increasing throughput, low latency, and high energy efficiency requirements.This paper focuses on the interesting class of Polar Codes that are currently a hot topic. We present a modular framework to automatically generate and evaluate a wide range of Polar Code decoders, with emphasis on design space exploration for efficient hardware architectures. To demonstrate the efficiency of our framework a very high throughput Soft Cancellation (SCAN) Polar Code decoder is shown that was automatically generated. This decoder is, to the best of our knowledge, the fastest SCAN Polar Code decoder published so far.</p

Low-Complexity Puncturing and Shortening of Polar Codes

In this work, we address the low-complexity construction of shortened and punctured polar codes from a unified view. While several independent puncturing and shortening designs were attempted in the literature, our goal is a unique, low-complexity construction encompassing both techniques in order to achieve any code length and rate. We observe that our solution significantly reduces the construction complexity as compared to state-of-the-art solutions while providing a block error rate performance comparable to constructions that are highly optimized for specific lengths and rates. This makes the constructed polar codes highly suitable for practical application in future communication systems requiring a large set of polar codes with different lengths and rates.Comment: to appear in WCNC 2017 - "Polar Coding in Wireless Communications: Theory and Implementation" Worksho

Magic state distillation with punctured polar codes

We present a scheme for magic state distillation using punctured polar codes. Our results build on some recent work by Bardet et al. (ISIT, 2016) who discovered that polar codes can be described algebraically as decreasing monomial codes. Using this powerful framework, we construct tri-orthogonal quantum codes (Bravyi et al., PRA, 2012) that can be used to distill magic states for the $T$ gate. An advantage of these codes is that they permit the use of the successive cancellation decoder whose time complexity scales as $O(N\log(N))$. We supplement this with numerical simulations for the erasure channel and dephasing channel. We obtain estimates for the dimensions and error rates for the resulting codes for block sizes up to $2^{20}$ for the erasure channel and $2^{16}$ for the dephasing channel. The dimension of the triply-even codes we obtain is shown to scale like $O(N^{0.8})$ for the binary erasure channel at noise rate $0.01$ and $O(N^{0.84})$ for the dephasing channel at noise rate $0.001$. The corresponding bit error rates drop to roughly $8\times10^{-28}$ for the erasure channel and $7 \times 10^{-15}$ for the dephasing channel respectively.Comment: 18 pages, 4 figure

Auto-Generation of Pipelined Hardware Designs for Polar Encoder

This paper presents a general framework for auto-generation of pipelined polar encoder architectures. The proposed framework could be well represented by a general formula. Given arbitrary code length $N$ and the level of parallelism $M$, the formula could specify the corresponding hardware architecture. We have written a compiler which could read the formula and then automatically generate its register-transfer level (RTL) description suitable for FPGA or ASIC implementation. With this hardware generation system, one could explore the design space and make a trade-off between cost and performance. Our experimental results have demonstrated the efficiency of this auto-generator for polar encoder architectures