Passivity-preserving parameterized model order reduction using singular values and matrix interpolation

We present a parameterized model order reduction method based on singular values and matrix interpolation. First, a fast technique using grammians is utilized to estimate the reduced order, and then common projection matrices are used to build parameterized reduced order models (ROMs). The design space is divided into cells, and a Krylov subspace is computed for each cell vertex model. The truncation of the singular values of the merged Krylov subspaces from the models located at the vertices of each cell yields a common projection matrix per design space cell. Finally, the reduced system matrices are interpolated using positive interpolation schemes to obtain a guaranteed passive parameterized ROM. Pertinent numerical results validate the proposed technique

Guaranteed passive parameterized model order reduction of the partial element equivalent circuit (PEEC) method

The decrease of IC feature size and the increase of operating frequencies require 3-D electromagnetic methods, such as the partial element equivalent circuit (PEEC) method, for the analysis and design of high-speed circuits. Very large systems of equations are often produced by 3-D electromagnetic methods. During the circuit synthesis of large-scale digital or analog applications, it is important to predict the response of the system under study as a function of design parameters, such as geometrical and substrate features, in addition to frequency (or time). Parameterized model order reduction (PMOR) methods become necessary to reduce large systems of equations with respect to frequency and other design parameters. We propose an innovative PMOR technique applicable to PEEC analysis, which combines traditional passivity-preserving model order reduction methods and positive interpolation schemes. It is able to provide parametric reduced-order models, stable, and passive by construction over a user-defined range of design parameter values. Numerical examples validate the proposed approach

Model order reduction of time-delay systems using a laguerre expansion technique

The demands for miniature sized circuits with higher operating speeds have increased the complexity of the circuit, while at high frequencies it is known that effects such as crosstalk, attenuation and delay can have adverse effects on signal integrity. To capture these high speed effects a very large number of system equations is normally required and hence model order reduction techniques are required to make the simulation of the circuits computationally feasible. This paper proposes a higher order Krylov subspace algorithm for model order reduction of time-delay systems based on a Laguerre expansion technique. The proposed technique consists of three sections i.e., first the delays are approximated using the recursive relation of Laguerre polynomials, then in the second part, the reduced order is estimated for the time-delay system using a delay truncation in the Laguerre domain and in the third part, a higher order Krylov technique using Laguerre expansion is computed for obtaining the reduced order time-delay system. The proposed technique is validated by means of real world numerical examples

Physics-based passivity-preserving parameterized model order reduction for PEEC circuit analysis

The decrease of integrated circuit feature size and the increase of operating frequencies require 3-D electromagnetic methods, such as the partial element equivalent circuit (PEEC) method, for the analysis and design of high-speed circuits. Very large systems of equations are often produced by 3-D electromagnetic methods, and model order reduction (MOR) methods have proven to be very effective in combating such high complexity. During the circuit synthesis of large-scale digital or analog applications, it is important to predict the response of the circuit under study as a function of design parameters such as geometrical and substrate features. Traditional MOR techniques perform order reduction only with respect to frequency, and therefore the computation of a new electromagnetic model and the corresponding reduced model are needed each time a design parameter is modified, reducing the CPU efficiency. Parameterized model order reduction (PMOR) methods become necessary to reduce large systems of equations with respect to frequency and other design parameters of the circuit, such as geometrical layout or substrate characteristics. We propose a novel PMOR technique applicable to PEEC analysis which is based on a parameterization process of matrices generated by the PEEC method and the projection subspace generated by a passivity-preserving MOR method. The proposed PMOR technique guarantees overall stability and passivity of parameterized reduced order models over a user-defined range of design parameter values. Pertinent numerical examples validate the proposed PMOR approach

Interpolation-based parameterized model order reduction of delayed systems

Three-dimensional electromagnetic methods are fundamental tools for the analysis and design of high-speed systems. These methods often generate large systems of equations, and model order reduction (MOR) methods are used to reduce such a high complexity. When the geometric dimensions become electrically large or signal waveform rise times decrease, time delays must be included in the modeling. Design space optimization and exploration are usually performed during a typical design process that consequently requires repeated simulations for different design parameter values. Efficient performing of these design activities calls for parameterized model order reduction (PMOR) methods, which are able to reduce large systems of equations with respect to frequency and other design parameters of the circuit, such as layout or substrate features. We propose a novel PMOR method for neutral delayed differential systems, which is based on an efficient and reliable combination of univariate model order reduction methods, a procedure to find scaling and frequency shifting coefficients and positive interpolation schemes. The proposed scaling and frequency shifting coefficients enhance and improve the modeling capability of standard positive interpolation schemes and allow accurate modeling of highly dynamic systems with a limited amount of initial univariate models in the design space. The proposed method is able to provide parameterized reduced order models passive by construction over the design space of interest. Pertinent numerical examples validate the proposed PMOR approach

A Passivity-Preserving Frequency-Weighted Model Order Reduction Technique

© 2004-2012 IEEE. Frequency-weighted model order reduction techniques aim to yield a reduced order model whose output matches that of the original system in the emphasized frequency region. However, passivity of the original system is only known to be preserved in the single-sided weighted case. A frequency-weighted model order reduction technique is proposed, which guarantees the passive reduced models in the double-sided weighted case. A set of easily computable error bound expressions are also presented

Matrix-interpolation-based parametric model order reduction for multiconductor transmission lines with delays

A novel parametric model order reduction technique based on matrix interpolation for multiconductor transmission lines (MTLs) with delays having design parameter variations is proposed in this brief. Matrix interpolation overcomes the oversize problem caused by input-output system-level interpolation-based parametric macromodels. The reduced state-space matrices are obtained using a higher-order Krylov subspace-based model order reduction technique, which is more efficient in comparison to the Gramian-based parametric modeling in which the projection matrix is computed using a Cholesky factorization. The design space is divided into cells, and then the Krylov subspaces computed for each cell are merged and then truncated using an adaptive truncation algorithm with respect to their singular values to obtain a compact common projection matrix. The resulting reduced-order state-space matrices and the delays are interpolated using positive interpolation schemes, making it computationally cheap and accurate for repeated system evaluations under different design parameter settings. The proposed technique is successfully applied to RLC (R-resistor, L-inductor, C-capacitance) and MTL circuits with delays