Формат POSIT как формат представления числовых значений в нейронных сетях на устройствах программируемой логики

В данной работе рассматривается возможность применения формата POSIT для представления чисел в нейронных сетях, реализуемых на устройствах программируемой логики. FPGA имеют ограниченные ресурсы обработки данных, поэтому при разработке нейронных сетей на FPGA сталкиваются с вопросом представления чисел. Формат представления должен обеспечивать точность результатов в пределах принятых разработчиками норм и предоставлять максимальную производительность при работе с ними. Формат POSIT является кандидатом на роль одного из форматов в области

Brightening the Optical Flow through Posit Arithmetic

As new technologies are invented, their commercial viability needs to be carefully examined along with their technical merits and demerits. The posit data format, proposed as a drop-in replacement for IEEE 754 float format, is one such invention that requires extensive theoretical and experimental study to identify products that can benefit from the advantages of posits for specific market segments. In this paper, we present an extensive empirical study of posit-based arithmetic vis-\`a-vis IEEE 754 compliant arithmetic for the optical flow estimation method called Lucas-Kanade (LuKa). First, we use SoftPosit and SoftFloat format emulators to perform an empirical error analysis of the LuKa method. Our study shows that the average error in LuKa with SoftPosit is an order of magnitude lower than LuKa with SoftFloat. We then present the integration of the hardware implementation of a posit adder and multiplier in a RISC-V open-source platform. We make several recommendations, along with the analysis of LuKa in the RISC-V context, for future generation platforms incorporating posit arithmetic units.Comment: To appear in ISQED 202

Hardware cost evaluation of the posit number system

National audienceThe posit number system is proposed as a replacement of IEEE floats. It encodes floating-point values with tapered precision: numbers whose exponent is close to 0 have more precision than IEEE floats, while numbers with high-magnitude exponents have lower precision, because their encoding takes bits from the significand. In addition, the posit standard mandates the presence of the "quire", a Kulisch-like large accumulator able to perform exact sums of products. Several works have demonstrated that posit arithmetic can provide improved accuracy at the application level. However, the variable-length fields of posit encoding impacts the hardware cost of posit arithmetic. Existing comparisons of posit hardware versus float hardware are unconvincing, and the overhead of the exact accumulator has not been studied in detail so far. This work aims at filling this gap. To this purpose, it introduces an open-source tool to compare the respective costs of floats and posits on an application basis. A C++ templatized library compatible with Vivado HLS implements operators for custom size posits and their associated quire. These architectures are evaluated on recent FPGA hardware and compared to their IEEE-754 counterpart. The standard 32 bits posit adder is found to be twice as large as the corresponding floating-point adder. Posit multiplication requires about 7 times more LUTs and a few more DSPs for a latency which is 2x worst than the IEEE-754 32 bit multiplier. Furthermore , the cost of the posit 32 quire is shown to be the same as a 32 bits floating-point Kulisch accumulator

Comparaison du coût matériel des posit et IEEE-754

The posit number system is an elegant encoding of floating-point values proposed as a drop-in replacement for the IEEE-754 standard. On the one side, posits sacrifice some of IEEE-754 complexity (directed rounding modes, infinities, NaNs). On the other side, their variable-size exponent and significand fields require extra encoding and decoding steps, and their higher best-case accuracy requires wider data-paths. The posit encoding/decoding overhead can be reduced by keeping posits decoded in processor registers, with the operators suitably modified to avoid double-rounding issues.An unbiased quantitative comparison of the hardware costs of these two encodings is based on an analytical study and an open-source C++ library suitable for High-Level Synthesis. This library offers posit and IEEE-754 parametrized operators for addition/subtraction, multiplication, and exact accumulation, all developed with the same high design effort and fully compliant to their respective standards.This library improves the state of the art of posit hardware arithmetic, and still, IEEE-754 operators remain between 30% and 60% faster and smaller than their posit counterparts.Les posit sont un encodage des nombres en virgule flottantes présentés comme une alternative au standard IEEE-754.D'un côté, les posit se débarassent d'une partie de la complexité des IEEE-754 (arrondis dirigés, infinis, NaN).De l'autre, l'encodage à taille variable de leur exposant et fraction nécessitent une étape de décodage et d'encodage supplémentaire, et leur meilleure précision maximale nécessitent des chemins de données plus larges.Le surcoût lié à l'encodage/décodage des posit peut être réduit en gardant les posit décodés dans les registres du CPU, en modifiant les opérateurs de façon à éviter les problèmes de double arrondi.Une comparaison quantitative et non biaisée du coût matériel de ces deux encodages est basée sur une étude analytique et une bibliothèque C++ open-source, compatible avec les outils de synthèse haut niveau (HLS). Cette bibliothèque offre des opérateurs pour l'addition/soustraction, multiplication et exact accumulation pour des formats posit et IEEE-754 arbitraires. Les opérateurs pour ces deux encodages sont développés avec le même effort et suivent leurs standards respectifs.Les opérateurs proposés améliorent l'état de l'art des opérateurs arithmétiques posit, et malgré cela les opérateurs IEEE-754 restent entre 30% et 60% plus rapide et plus petits que leur équivalent posit

Study of the posit number system: a practical approach

The IEEE Standard for Floating-Point Arithmetic (IEEE 754) has been for decades the standard for floating-point arithmetic and is implemented in a vast majority of modern computer systems. Recently, a new number representation format called posit (Type III unum) introduced by John L. Gustafson – who claims this new format can provide higher accuracy using equal or less number of bits and simpler hardware than current standard – is proposed as an alternative to the now omnipresent IEEE 754 arithmetic. In this Bachelor dissertation, the novel posit number format, its characteristics and properties – presented in literature – are analyzed and compared with the standard for floating-point numbers (floats). Based on the literature assertions, we focus on determining whether posits would be a good “drop-in replacement” for floats. With the help of Wolfram Mathematica and Python, different environments are created to compare the performance of IEEE 754 floating-point standard with Type III unum: posits. In order to get a more practical approach, first, we propose different numerical problems to compare the accuracy of both formats, including algebraic problems and numerical methods. Then, we focus on the possible use of posits in Deep Learning problems, such as training artificial Neural Networks or preforming low-precision inference on Convolutional Neural Networks. To conclude this work, we propose a low-level design for posit arithmetic multiplier using the FloPoCo tool to generate synthesizable VHDL code

Posits: An Alternative to Floating Point Calculations

Floating point arithmetic is one of several methods of performing computations in digital designs; others include integer and fixed point computations. Fixed point utilizes a method comparable to scientific notation in the binary domain. In terms of computations, floating point is by far the most prevalent in today’s digital designs. Between the support offered by compilers, as well as for ready-to-use IP blocks, floating point units (FPU’s) are a de-facto standard for most processors. Despite its prevalence in modern designs, floating point has many flaws. One of the most common is the use of not-a-numbers (NaN’s). These are meant to provide a way of signaling invalid operation, however the excessive amount of them wastes usable bit patterns. As an alternative to floating point, a system named Universal Numbers or UNUMs was developed. This system consists of three different types, however for hardware compatibility, the Type III provides the best stand in for floating point. This system eliminates the NaN problem by only using one bit pattern, and also provides many other inherent benefits