Parallel Algorithm for Hardware Implementation of Inverse Halftoning

Abstract— A Parallel algorithm and its hardware implementation of Inverse Halftone operation is proposed in this paper. The algorithm is based on Lookup Tables from which the inverse halftone value of a pixel is directly determined using a pattern of pixels. A method has been developed that allows accessing more than one value from the lookup table at any time. The lookup table is divided into smaller lookup tables, such that each pattern selected at any time goes to a separate smaller lookup table. The 15-pixel parallel version of the algorithm was tested on sample images and a simple and effective method has been used to overcome quality degradation due to pixel loss in the proposed algorithm. It can provide at least 4 times decrease in lookup table size when compared with serial lookup table method implemented multiple times for same number of pixels

Parallel algorithm for hardware implementation of inverse halftoning

A parallel algorithm and its hardware implementation are proposed for an inverse halftone operation. The algorithm is based on lookup tables from which the inverse halftone value of a pixel is directly determined using a pattern of pixels. A method has been developed that allows accessing more than one value from the lookup table at any time. The lookup table is divided into smaller lookup tables, such that each pattern selected at any time goes to a separate smaller lookup table. The 15-pixel parallel version of the algorithm was tested on sample images and a simple and effective method has been used to overcome quality degradation due to pixel loss in the proposed algorithm. It can provide at least 4 times decrease in lookup table size when compared with a serial lookup table method implemented multiple times for the same number of pixels

Algorithm for Parallel Inverse Halftoning using Partitioning of Look-Up Table (LUT)

The Look-Up Table (LUT) method for inverse halftoning is fast and computation-free technique employed to obtain good quality images. In this work we propose a new algorithm to parallelize the LUT method so that more pixels can be concurrently inverse halftoned using minimum additional hardware. The proposed algorithm partitions the single LUT of serial LUT method into N smaller Look-Up Tables (s-LUTs) such that the total number of entries in all s-LUTs remain equal to the number of entries in the single LUT of serial LUT method. The proposed algorithm can be implemented on a single FPGA (Field Programmable Gate Arrays) device with external memories to store s-LUTs