Optimizing Designs Using the Addition of Deflection Operations

Abstract—This paper introduces hot potato behavioral synthesis transformation techniques. These techniques add deflection operations in the behavioral description of a computation in such a way that the requirements for two important components of the final implementation cost, the number of registers and the number of interconnects, are significantly reduced. Moreover, we demonstrate how hot potato techniques can be effectively used during behavioral synthesis to minimize the partial scan overhead to make the synthesized design testable. Index Terms—Digital system testing, high-level synthesis, optimization, sequential logic circuit. I