260 research outputs found
Distributed video coding for wireless video sensor networks: a review of the state-of-the-art architectures
Distributed video coding (DVC) is a relatively new video coding architecture originated from two fundamental theorems namely, Slepian–Wolf and Wyner–Ziv. Recent research developments have made DVC attractive for applications in the emerging domain of wireless video sensor networks (WVSNs). This paper reviews the state-of-the-art DVC architectures with a focus on understanding their opportunities and gaps in addressing the operational requirements and application needs of WVSNs
A Microprocessor based hybrid system for digital error correction
The design of a microprocessor based hybrid system for digital error correction is presented. It is shown that such a system allows for implementation of several cyclic codes at a variety of throughput rates providing variable degrees of error correction depending on current user requirements. The theoretical basis for encoding and decoding of binary BCH codes is reviewed. Design and implementation of system hardware and software are described. A method for injection of independent bit errors with controllable statistics into the system is developed, and its accuracy verified by computer simulation. This method of controllable error injection is used to test performance of the designed system. In analysis, these results demonstrate the flexibility of operation provided by the hybrid nature of the system. Finally, potential applications and modifications are presented to reinforce the wide applicability of the system described in this thesis
A Comparison Study of LDPC and BCH Codes
The need for efficient and reliable digital data communication systems has been rising
rapidly in recent years. There are various reasons that have brought this need for the
communication systems, among them are the increase in automatic data processing
equipment and the increased need for long range communication. Therefore, the
LDPC and BCH codes were developed for achieving more reliable data transmission
in communication systems. This project covers the research about the LDPC and
BCH error correction codes. Algorithm for simulating both the LDPC and BCH
codes were also being investigated, which includes generating the parity check
matrix, generating the message code in Galois array matrix, encoding the message
bits, modulation and decoding the message bits for LDPC. Matlab software is used
for encoding and decoding the codes. The percentage of accuracy for LDPC
simulation codes are ranging from 95% to 99%. The results obtained shows that the
LDPC codes are more efficient and reliable than the BCH codes coding method of
error correction because the LDPC codes had a channel performance very close to the
Shannon limit. LDPC codes are a class of linear block codes that are proving to be
the best performing forward error correction available. Markets such as broadband
wireless and mobile networks operate in noisy environments and need powerful error
correction in order to improve reliability and better data rates. Through LDPC and
BCH codes, these systems can operate more reliably, efficiently and at higher data
rates
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