On Tuning the Microarchitecture of an HPS Implementation of the VAX

The HPS Microarchitecture has been developed as an execution model for implementing various architectures at very high performance. A considerable amount of effort has gone into the use of HPS as a microarchitecture for the VAX. In this paper, we describe our first full simulation of the microVAX subset, and report the results of varying (i.e. tuning) certain important parameters. 1 Iptroduction HPS (High Performance Substrate) is a microarchitecture for im-plementing high performance computing engines. It exploits con-currency by using a restriction of classical fine granularity data flow [6]. This is a part of the Aquarius project, whose goal is to obtain enormous improvements in computer performance, in part by exploiting concurrency at alI levels of transformation