1 research outputs found

    On the Performance of an Indicator-Based Stall Avoidance Mechanism for High-Speed Downlink Packet Access Systems

    No full text
    Abstract—The stall of delivering medium access control (MAC) layer data to the upper layer is a serious problem when a negative acknowledgement (NACK) control signal becomes an acknowledgement (ACK) signal, especially for a high-speed mobile terminal during handoff. Stall avoidance mechanisms aim to reduce such the transmission delay and keep in-sequence delivery of the MAC layer data to the upper layer. Recently, for providing highspeed downlink packet access (HSDPA) in the wideband codedivision multiple access system, an indicator-based stall avoidance (ISA) mechanism was proposed to remove the nonrecoverable gap in the received out-of-sequence packets. In this paper, we derive the closed-form expression for the gap-processing time of the ISA mechanism when applying the multiprocess stop-and-wait (SAW) hybrid automatic repeat request (HARQ) mechanism. The derived analytical formulas can be used to understand performance tradeoffs between the gap-processing time and throughput in terms of various numbers of users and parallel processes when implementing the multiprocess SAW HARQ mechanism in the HSDPA system
    corecore