704 research outputs found

    A Method to determine Partial Weight Enumerator for Linear Block Codes

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    In this paper we present a fast and efficient method to find partial weight enumerator (PWE) for binary linear block codes by using the error impulse technique and Monte Carlo method. This PWE can be used to compute an upper bound of the error probability for the soft decision maximum likelihood decoder (MLD). As application of this method we give partial weight enumerators and analytical performances of the BCH(130,66), BCH(103,47) and BCH(111,55) shortened codes; the first code is obtained by shortening the binary primitive BCH (255,191,17) code and the two other codes are obtained by shortening the binary primitive BCH(127,71,19) code. The weight distributions of these three codes are unknown at our knowledge.Comment: Computer Engineering and Intelligent Systems Vol 3, No.11, 201

    A parallel Viterbi decoder for block cyclic and convolution codes

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    We present a parallel version of Viterbi's decoding procedure, for which we are able to demonstrate that the resultant task graph has restricted complexity in that the number of communications to or from any processor cannot exceed 4 for BCH codes. The resulting algorithm works in lock step making it suitable for implementation on a systolic processor array, which we have implemented on a field programmable gate array and demonstrate the perfect scaling of the algorithm for two exemplar BCH codes. The parallelisation strategy is applicable to all cyclic codes and convolution codes. We also present a novel method for generating the state transition diagrams for these codes
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