3,488 research outputs found
A Comparative Study of Multiple Object Detection Using Haar-Like Feature Selection and Local Binary Patterns in Several Platforms
Object detection has been attracting much interest due to the wide spectrum of applications that use it. It has been driven by an increasing processing power available in software and hardware platforms. In this work we present a developed application for multiple objects detection based on OpenCV libraries. The complexity-related aspects that were considered in the object detection using cascade classifier are described. Furthermore, we discuss the profiling and porting of the application into an embedded platform and compare the results with those obtained on traditional platforms. The proposed application deals with real-time systems implementation and the results give a metric able to select where the cases of object detection applications may be more complex and where it may be simpler
Towards a Scalable Hardware/Software Co-Design Platform for Real-time Pedestrian Tracking Based on a ZYNQ-7000 Device
Currently, most designers face a daunting task to
research different design flows and learn the intricacies of
specific software from various manufacturers in
hardware/software co-design. An urgent need of creating a
scalable hardware/software co-design platform has become a key
strategic element for developing hardware/software integrated
systems. In this paper, we propose a new design flow for building
a scalable co-design platform on FPGA-based system-on-chip.
We employ an integrated approach to implement a histogram
oriented gradients (HOG) and a support vector machine (SVM)
classification on a programmable device for pedestrian tracking.
Not only was hardware resource analysis reported, but the
precision and success rates of pedestrian tracking on nine open
access image data sets are also analysed. Finally, our proposed
design flow can be used for any real-time image processingrelated
products on programmable ZYNQ-based embedded
systems, which benefits from a reduced design time and provide a
scalable solution for embedded image processing products
Evaluating Rapid Application Development with Python for Heterogeneous Processor-based FPGAs
As modern FPGAs evolve to include more het- erogeneous processing elements,
such as ARM cores, it makes sense to consider these devices as processors first
and FPGA accelerators second. As such, the conventional FPGA develop- ment
environment must also adapt to support more software- like programming
functionality. While high-level synthesis tools can help reduce FPGA
development time, there still remains a large expertise gap in order to realize
highly performing implementations. At a system-level the skill set necessary to
integrate multiple custom IP hardware cores, interconnects, memory interfaces,
and now heterogeneous processing elements is complex. Rather than drive FPGA
development from the hardware up, we consider the impact of leveraging Python
to ac- celerate application development. Python offers highly optimized
libraries from an incredibly large developer community, yet is limited to the
performance of the hardware system. In this work we evaluate the impact of
using PYNQ, a Python development environment for application development on the
Xilinx Zynq devices, the performance implications, and bottlenecks associated
with it. We compare our results against existing C-based and hand-coded
implementations to better understand if Python can be the glue that binds
together software and hardware developers.Comment: To appear in 2017 IEEE 25th Annual International Symposium on
Field-Programmable Custom Computing Machines (FCCM'17
An initial performance review of software components for a heterogeneous computing platform
The design of embedded systems is a complex activity that involves a lot of
decisions. With high performance demands of present day usage scenarios and
software, they often involve energy hungry state-of-the-art computing units.
While focusing on power consumption of computing units, the physical properties
of software are often ignored. Recently, there has been a growing interest to
quantify and model the physical footprint of software (e.g. consumed power,
generated heat, execution time, etc.), and a component based approach
facilitates methods for describing such properties. Based on these, software
architects can make energy-efficient software design solutions. This paper
presents power consumption and execution time profiling of a component software
that can be allocated on heterogeneous computing units (CPU, GPU, FPGA) of a
tracked robot
FFT-Based Deep Learning Deployment in Embedded Systems
Deep learning has delivered its powerfulness in many application domains,
especially in image and speech recognition. As the backbone of deep learning,
deep neural networks (DNNs) consist of multiple layers of various types with
hundreds to thousands of neurons. Embedded platforms are now becoming essential
for deep learning deployment due to their portability, versatility, and energy
efficiency. The large model size of DNNs, while providing excellent accuracy,
also burdens the embedded platforms with intensive computation and storage.
Researchers have investigated on reducing DNN model size with negligible
accuracy loss. This work proposes a Fast Fourier Transform (FFT)-based DNN
training and inference model suitable for embedded platforms with reduced
asymptotic complexity of both computation and storage, making our approach
distinguished from existing approaches. We develop the training and inference
algorithms based on FFT as the computing kernel and deploy the FFT-based
inference model on embedded platforms achieving extraordinary processing speed.Comment: Design, Automation, and Test in Europe (DATE) For source code, please
contact Mahdi Nazemi at <[email protected]
Optimum Selection of DNN Model and Framework for Edge Inference
This paper describes a methodology to select the optimum combination of deep neuralnetwork and software framework for visual inference on embedded systems. As a first step, benchmarkingis required. In particular, we have benchmarked six popular network models running on four deep learningframeworks implemented on a low-cost embedded platform. Three key performance metrics have beenmeasured and compared with the resulting 24 combinations: accuracy, throughput, and power consumption.Then, application-level specifications come into play. We propose a figure of merit enabling the evaluationof each network/framework pair in terms of relative importance of the aforementioned metrics for a targetedapplication. We prove through numerical analysis and meaningful graphical representations that only areduced subset of the combinations must actually be considered for real deployment. Our approach can beextended to other networks, frameworks, and performance parameters, thus supporting system-level designdecisions in the ever-changing ecosystem of embedded deep learning technology.Ministerio de Economía y Competitividad (TEC2015-66878-C3-1-R)Junta de Andalucía (TIC 2338-2013)European Union Horizon 2020 (Grant 765866
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