3 research outputs found

    Development and Simulation Assessment of Semiconductor Production System Enhancements for Fast Cycle Times

    Get PDF
    Long cycle times in semiconductor manufacturing represent an increasing challenge for the industry and lead to a growing need of break-through approaches to reduce it. Small lot sizes and the conversion of batch processes to mini-batch or single-wafer processes are widely regarded as a promising means for a step-wise cycle time reduction. Our analysis with discrete-event simulation and queueing theory shows that small lot size and the replacement of batch tools with mini-batch or single wafer tools are beneficial but lot size reduction lacks persuasive effectiveness if reduced by more than half. Because the results are not completely convincing, we develop a new semiconductor tool type that further reduces cycle time by lot streaming leveraging the lot size reduction efforts. We show that this combined approach can lead to a cycle time reduction of more than 80%

    The Analytic Forecast Method (AFM) - Entwicklung eines analytischen Ansatzes zur Materialanlieferungsprognose in der Halbleiterfertigung

    Get PDF
    The usual forecast method in semiconductor industry is simulation. Due to the manufacturing environment, the number of processes and the multitude of disturbing factors the development of high-fidelity simulation model is time-consuming and requires a huge amount of high quality basic data. The simulation facilitates a detailed prediction possible, but in many cases this level of detail of the forecast information is not required. In this paper, we present an alternative forecast method. It is considerably faster and the results for a subset of parameters are comparable to simulation. The solution does not need a complete fab model but a limited mathematical system and some fast algorithms which make the forecast of important parameters or characteristics possible. The prediction is based completely on statistics extracted from historical lot data traces. It is already implemented and tested in a real semiconductor fab environment and we also present some validation results
    corecore