1 research outputs found
Single chip photonic deep neural network with accelerated training
As deep neural networks (DNNs) revolutionize machine learning, energy
consumption and throughput are emerging as fundamental limitations of CMOS
electronics. This has motivated a search for new hardware architectures
optimized for artificial intelligence, such as electronic systolic arrays,
memristor crossbar arrays, and optical accelerators. Optical systems can
perform linear matrix operations at exceptionally high rate and efficiency,
motivating recent demonstrations of low latency linear algebra and optical
energy consumption below a photon per multiply-accumulate operation. However,
demonstrating systems that co-integrate both linear and nonlinear processing
units in a single chip remains a central challenge. Here we introduce such a
system in a scalable photonic integrated circuit (PIC), enabled by several key
advances: (i) high-bandwidth and low-power programmable nonlinear optical
function units (NOFUs); (ii) coherent matrix multiplication units (CMXUs); and
(iii) in situ training with optical acceleration. We experimentally demonstrate
this fully-integrated coherent optical neural network (FICONN) architecture for
a 3-layer DNN comprising 12 NOFUs and three CMXUs operating in the telecom
C-band. Using in situ training on a vowel classification task, the FICONN
achieves 92.7% accuracy on a test set, which is identical to the accuracy
obtained on a digital computer with the same number of weights. This work lends
experimental evidence to theoretical proposals for in situ training, unlocking
orders of magnitude improvements in the throughput of training data. Moreover,
the FICONN opens the path to inference at nanosecond latency and femtojoule per
operation energy efficiency.Comment: 21 pages, 10 figures. Comments welcom