137 research outputs found

    Progressive Differences Convolutional Low-Density Parity-Check Codes

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    We present a new family of low-density parity-check (LDPC) convolutional codes that can be designed using ordered sets of progressive differences. We study their properties and define a subset of codes in this class that have some desirable features, such as fixed minimum distance and Tanner graphs without short cycles. The design approach we propose ensures that these properties are guaranteed independently of the code rate. This makes these codes of interest in many practical applications, particularly when high rate codes are needed for saving bandwidth. We provide some examples of coded transmission schemes exploiting this new class of codes.Comment: 8 pages, 2 figures. Accepted for publication in IEEE Communications Letters. Copyright transferred to IEE

    Binary Message Passing Decoding of Product-like Codes

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    We propose a novel binary message passing decoding algorithm for product-like codes based on bounded distance decoding (BDD) of the component codes. The algorithm, dubbed iterative BDD with scaled reliability (iBDD-SR), exploits the channel reliabilities and is therefore soft in nature. However, the messages exchanged by the component decoders are binary (hard) messages, which significantly reduces the decoder data flow. The exchanged binary messages are obtained by combining the channel reliability with the BDD decoder output reliabilities, properly conveyed by a scaling factor applied to the BDD decisions. We perform a density evolution analysis for generalized low-density parity-check (GLDPC) code ensembles and spatially coupled GLDPC code ensembles, from which the scaling factors of the iBDD-SR for product and staircase codes, respectively, can be obtained. For the white additive Gaussian noise channel, we show performance gains up to 0.290.29 dB and 0.310.31 dB for product and staircase codes compared to conventional iterative BDD (iBDD) with the same decoder data flow. Furthermore, we show that iBDD-SR approaches the performance of ideal iBDD that prevents miscorrections.Comment: Accepted for publication in the IEEE Transactions on Communication

    Low-Power 400-Gbps Soft-Decision LDPC FEC for Optical Transport Networks

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    We present forward error correction systems based on soft-decision low-density parity check (LDPC) codes for applications in 100–400-Gbps optical transport networks. These systems are based on the low-complexity “adaptive degeneration” decoding algorithm, which we introduce in this paper, along with randomly-structured LDPC codes with block lengths from 30 000 to 60 000 bits and overhead (OH) from 6.7% to 33%. We also construct a 3600-bit prototype LDPC code with 20% overhead, and experimentally show that it has no error floor above a bit error rate (BER) of 10−15 using a field-programmable gate array (FPGA)-based hardware emulator. The projected net coding gain at a BER of 10−15 ranges from 9.6 dB at 6.7% OH to 11.2 dB at 33% OH. We also present application-specific integrated circuit synthesis results for these decoders in 28 nm fully depleted silicon on insulator technology, which show that they are capable of 400-Gbps operation with energy consumption of under 3 pJ per information bit

    Replacing the Soft FEC Limit Paradigm in the Design of Optical Communication Systems

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    The FEC limit paradigm is the prevalent practice for designing optical communication systems to attain a certain bit-error rate (BER) without forward error correction (FEC). This practice assumes that there is an FEC code that will reduce the BER after decoding to the desired level. In this paper, we challenge this practice and show that the concept of a channel-independent FEC limit is invalid for soft-decision bit-wise decoding. It is shown that for low code rates and high order modulation formats, the use of the soft FEC limit paradigm can underestimate the spectral efficiencies by up to 20%. A better predictor for the BER after decoding is the generalized mutual information, which is shown to give consistent post-FEC BER predictions across different channel conditions and modulation formats. Extensive optical full-field simulations and experiments are carried out in both the linear and nonlinear transmission regimes to confirm the theoretical analysis

    Staircase Codes: FEC for 100 Gb/s OTN

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    Staircase codes, a new class of forward-error-correction (FEC) codes suitable for high-speed optical communications, are introduced. An ITU-T G.709-compatible staircase code with rate R=239/255 is proposed, and FPGA-based simulation results are presented, exhibiting a net coding gain (NCG) of 9.41 dB at an output error rate of 1E-15, an improvement of 0.42 dB relative to the best code from the ITU-T G.975.1 recommendation. An error floor analysis technique is presented, and the proposed code is shown to have an error floor at 4.0E-21.Comment: To appear in IEEE/OSA J. of Lightwave Technolog
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