148,675 research outputs found
Sequent and Hypersequent Calculi for Abelian and Lukasiewicz Logics
We present two embeddings of infinite-valued Lukasiewicz logic L into Meyer
and Slaney's abelian logic A, the logic of lattice-ordered abelian groups. We
give new analytic proof systems for A and use the embeddings to derive
corresponding systems for L. These include: hypersequent calculi for A and L
and terminating versions of these calculi; labelled single sequent calculi for
A and L of complexity co-NP; unlabelled single sequent calculi for A and L.Comment: 35 pages, 1 figur
Neutrality and Many-Valued Logics
In this book, we consider various many-valued logics: standard, linear,
hyperbolic, parabolic, non-Archimedean, p-adic, interval, neutrosophic, etc. We
survey also results which show the tree different proof-theoretic frameworks
for many-valued logics, e.g. frameworks of the following deductive calculi:
Hilbert's style, sequent, and hypersequent. We present a general way that
allows to construct systematically analytic calculi for a large family of
non-Archimedean many-valued logics: hyperrational-valued, hyperreal-valued, and
p-adic valued logics characterized by a special format of semantics with an
appropriate rejection of Archimedes' axiom. These logics are built as different
extensions of standard many-valued logics (namely, Lukasiewicz's, Goedel's,
Product, and Post's logics). The informal sense of Archimedes' axiom is that
anything can be measured by a ruler. Also logical multiple-validity without
Archimedes' axiom consists in that the set of truth values is infinite and it
is not well-founded and well-ordered. On the base of non-Archimedean valued
logics, we construct non-Archimedean valued interval neutrosophic logic INL by
which we can describe neutrality phenomena.Comment: 119 page
Arithmetic Operations in Multi-Valued Logic
This paper presents arithmetic operations like addition, subtraction and
multiplications in Modulo-4 arithmetic, and also addition, multiplication in
Galois field, using multi-valued logic (MVL). Quaternary to binary and binary
to quaternary converters are designed using down literal circuits. Negation in
modular arithmetic is designed with only one gate. Logic design of each
operation is achieved by reducing the terms using Karnaugh diagrams, keeping
minimum number of gates and depth of net in to consideration. Quaternary
multiplier circuit is proposed to achieve required optimization. Simulation
result of each operation is shown separately using Hspice.Comment: 12 Pages, VLSICS Journal 201
Relevant Logics Obeying Component Homogeneity
This paper discusses three relevant logics that obey Component Homogeneity - a principle that Goddard and Routley introduce in their project of a logic of significance. The paper establishes two main results. First, it establishes a general characterization result for two families of logic that obey Component Homogeneity - that is, we provide a set of necessary and sufficient conditions for their consequence relations. From this, we derive characterization results for S*fde, dS*fde, crossS*fde. Second, the paper establishes complete sequent calculi for S*fde, dS*fde, crossS*fde. Among the other accomplishments of the paper, we generalize the semantics from Bochvar, Hallden, Deutsch and Daniels, we provide a general recipe to define containment logics, we explore the single-premise/single-conclusion fragment of S*fde, dS*fde, crossS*fdeand the connections between crossS*fde and the logic Eq of equality by Epstein. Also, we present S*fde as a relevant logic of meaninglessness that follows the main philosophical tenets of Goddard and Routley, and we briefly examine three further systems that are closely related to our main logics. Finally, we discuss Routley's criticism to containment logic in light of our results, and overview some open issues
A Synthesis Method for Quaternary Quantum Logic Circuits
Synthesis of quaternary quantum circuits involves basic quaternary gates and
logic operations in the quaternary quantum domain. In this paper, we propose
new projection operations and quaternary logic gates for synthesizing
quaternary logic functions. We also demonstrate the realization of the proposed
gates using basic quantum quaternary operations. We then employ our synthesis
method to design of quaternary adder and some benchmark circuits. Our results
in terms of circuit cost, are better than the existing works.Comment: 10 page
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