Artificial Intelligence in Engineering Risk Analytics

Risks exist in every aspect of our lives, and can mean different things to different people. While negative in general they always cause a great deal of potential damage and inconvenience for stakeholders. Recent engineering risks include the Fukushima nuclear plant disaster from the 2011 tsunami, a year that also saw earthquakes in New Zealand, tornados in the US, and floods in both Australia and Thailand. Earthquakes, tornados (not to mention hurricanes) and floods are repetitive natural phenomenon. But the October 2011 floods in Thailand were the worst in 50 years, impacting supply chains including those of Honda, Toyota, Lenovo, Fujitsu, Nippon Steel, Tesco, and Canon. Human-induced tragedies included a clothing factory fire in Bangladesh in 2012 that left over 100 dead. Wal-Mart and Sears supply chains were downstream customers. The events of Bhopal in 1984, Chernobyl in 1986, Exxon Valdez in 1989, and the Gulf oil spill of 2010 were tragic accidents. There are also malicious events such as the Tokyo Sarin attach in 1995, The World Trade Center and Pentagon attacks in 2001, and terrorist attacks on subways in Madrid (2004), London (2005), and Moscow (2010). The news brings us reports of such events all too often. The next step up in intensity is war, which seems to always be with us in some form somewhere in the world. Complex human systems also cause problems. The financial crisis resulted in recession in all aspects of the economy. Risk and analytics has become an important topic in today’s more complex, interrelated global environment, replete with threats from natural, engineering, economic, and technical sources (Olson and Wu, 2015)

Soft-Error Resilience Framework For Reliable and Energy-Efficient CMOS Logic and Spintronic Memory Architectures

The revolution in chip manufacturing processes spanning five decades has proliferated high performance and energy-efficient nano-electronic devices across all aspects of daily life. In recent years, CMOS technology scaling has realized billions of transistors within large-scale VLSI chips to elevate performance. However, these advancements have also continually augmented the impact of Single-Event Transient (SET) and Single-Event Upset (SEU) occurrences which precipitate a range of Soft-Error (SE) dependability issues. Consequently, soft-error mitigation techniques have become essential to improve systems\u27 reliability. Herein, first, we proposed optimized soft-error resilience designs to improve robustness of sub-micron computing systems. The proposed approaches were developed to deliver energy-efficiency and tolerate double/multiple errors simultaneously while incurring acceptable speed performance degradation compared to the prior work. Secondly, the impact of Process Variation (PV) at the Near-Threshold Voltage (NTV) region on redundancy-based SE-mitigation approaches for High-Performance Computing (HPC) systems was investigated to highlight the approach that can realize favorable attributes, such as reduced critical datapath delay variation and low speed degradation. Finally, recently, spin-based devices have been widely used to design Non-Volatile (NV) elements such as NV latches and flip-flops, which can be leveraged in normally-off computing architectures for Internet-of-Things (IoT) and energy-harvesting-powered applications. Thus, in the last portion of this dissertation, we design and evaluate for soft-error resilience NV-latching circuits that can achieve intriguing features, such as low energy consumption, high computing performance, and superior soft errors tolerance, i.e., concurrently able to tolerate Multiple Node Upset (MNU), to potentially become a mainstream solution for the aerospace and avionic nanoelectronics. Together, these objectives cooperate to increase energy-efficiency and soft errors mitigation resiliency of larger-scale emerging NV latching circuits within iso-energy constraints. In summary, addressing these reliability concerns is paramount to successful deployment of future reliable and energy-efficient CMOS logic and spintronic memory architectures with deeply-scaled devices operating at low-voltages

Reliability of multi-channel IEC 61850 mission-critical substation communication networks based on Markov process incorporating linear dynamical systems and calculus inferences.

Doctoral Degree. University of KwaZulu-Natal, Durban.IEC 61850 based Substation Communication Networks (SCN) enable substation processes to be digitalised to fulfil the most sought substation monitoring, protection and control of electrical systems. The standard enables peer-to-peer communication of mission critical messages, aided by onboard diagnostic capabilities to ease the identification of system faults. The implementation of Safety-Related Systems in industrial facilities comprising sensors, logic solvers and final elements in power distribution centres necessitate compliance to IEC 61508 standard, where circuit breakers act as final elements to isolate electrical machines. In recent times, combinatorial methods such as the Reliability Block Diagram have been used to evaluate the architecture of IEC 61850 based SCN reliability and availability due to the simplicity of the approach. These methods, however, assume that all system faults are identified and fully repaired, which is not the case in practice. In this thesis, the reliability of a repairable multi-channel IEC 61850 based SCN architecture is modelled using a structure function and the Markov process while Systems Thinking integrates imperfect repair factors into the model. Thereafter, a novel eigenvalue analysis method based on Markov partitions and symbolic dynamics in the context of linear dynamical systems is used to investigate the impact of imperfect repairs on the system's reliability based on the number of mean state transitions and dynamical behaviour. The eigenvalue method is then advanced by a complimentary analysis technique based on the absorbing Markov Chain process and matrix calculus methods to determine the system's responsiveness to repair factors. The case studies results demonstrate that imperfect repairs cannot be ignored for mission-critical applications because the simplifying assumptions of combinatorial analysis methods greatly over-state the system's reliability performance. The results also indicate that common causes of failure coupled with imperfect repairs significantly negatively impact the system's performance. Moreover, system performance is highly dependent on the diagnostic coverage of the individual subsystems than their repair efficiencies for high diagnostic coverages at 90% and 99% based on ISO 13849-1. Hence, the results demonstrate that emphasis should be more on the system diagnostic coverage for the fact that it is embedded in the system design itself that cannot easily be changed once the system is commissioned and operational