11 research outputs found
Improved Successive Cancellation Flip Decoding of Polar Codes Based on Error Distribution
Polar codes are a class of linear block codes that provably achieves channel
capacity, and have been selected as a coding scheme for generation
wireless communication standards. Successive-cancellation (SC) decoding of
polar codes has mediocre error-correction performance on short to moderate
codeword lengths: the SC-Flip decoding algorithm is one of the solutions that
have been proposed to overcome this issue. On the other hand, SC-Flip has a
higher implementation complexity compared to SC due to the required
log-likelihood ratio (LLR) selection and sorting process. Moreover, it requires
a high number of iterations to reach good error-correction performance. In this
work, we propose two techniques to improve the SC-Flip decoding algorithm for
low-rate codes, based on the observation of channel-induced error
distributions. The first one is a fixed index selection (FIS) scheme to avoid
the substantial implementation cost of LLR selection and sorting with no cost
on error-correction performance. The second is an enhanced index selection
(EIS) criterion to improve the error-correction performance of SC-Flip
decoding. A reduction of in the implementation cost of logic elements
is estimated with the FIS approach, while simulation results show that EIS
leads to an improvement on error-correction performance improvement up to
dB at a target FER of .Comment: This version of the manuscript corrects an error in the previous
ArXiv version, as well as the published version in IEEE Xplore under the same
title, which has the DOI:10.1109/WCNCW.2018.8368991. The corrections include
all the simulations of SC-Flip-based and SC-Oracle decoders, along with
associated comments in-tex
Fast-SSC-Flip Decoding of Polar Codes
Polar codes are widely considered as one of the most exciting recent
discoveries in channel coding. For short to moderate block lengths, their
error-correction performance under list decoding can outperform that of other
modern error-correcting codes. However, high-speed list-based decoders with
moderate complexity are challenging to implement. Successive-cancellation
(SC)-flip decoding was shown to be capable of a competitive error-correction
performance compared to that of list decoding with a small list size, at a
fraction of the complexity, but suffers from a variable execution time and a
higher worst-case latency. In this work, we show how to modify the
state-of-the-art high-speed SC decoding algorithm to incorporate the SC-flip
ideas. The algorithmic improvements are presented as well as average
execution-time results tailored to a hardware implementation. The results show
that the proposed fast-SSC-flip algorithm has a decoding speed close to an
order of magnitude better than the previous works while retaining a comparable
error-correction performance.Comment: 5 pages, 3 figures, appeared at IEEE Wireless Commun. and Netw. Conf.
(WCNC) 201
Algorithm and Architecture for Path Metric Aided Bit-Flipping Decoding of Polar Codes
Polar codes attract more and more attention of researchers in recent years,
since its capacity achieving property. However, their error-correction
performance under successive cancellation (SC) decoding is inferior to other
modern channel codes at short or moderate blocklengths. SC-Flip (SCF) decoding
algorithm shows higher performance than SC decoding by identifying possibly
erroneous decisions made in initial SC decoding and flipping them in the
sequential decoding attempts. However, it performs not well when there are more
than one erroneous decisions in a codeword. In this paper, we propose a path
metric aided bit-flipping decoding algorithm to identify and correct more
errors efficiently. In this algorithm, the bit-flipping list is generated based
on both log likelihood ratio (LLR) based path metric and bit-flipping metric.
The path metric is used to verify the effectiveness of bit-flipping. In order
to reduce the decoding latency and computational complexity, its corresponding
pipeline architecture is designed. By applying these decoding algorithms and
pipeline architecture, an improvement on error-correction performance can be
got up to 0.25dB compared with SCF decoding at the frame error rate of
, with low average decoding latency.Comment: 6 pages, 6 figures, IEEE Wireless Communications and Networking
Conference (2019 WCNC