2 research outputs found

    Implementation of an UWB impulse-radio acquisition and despreading algorithm on a low power ASIP

    No full text
    Impulse Radio-based Ultra-Wideband (UWB) technology is a strong candidate for the implementation of ultra low power air interfaces in low data rate sensor networks. A major challenge in UWB receiver design is the low-power implementation of the relatively complex digital baseband algorithms that are required for timing acquisition and data demodulation. Silicon Hive offers low-power application specific instruction set processor (ASIP) solutions. In this paper we target the low-power implementation of an UWB receiver’s digital baseband algorithm on an ASIP, based on Silicon Hive’s solutions.We approach the problem as follows. First we implement the algorithm on an existing ASIP and analyze the power consumption. Next we apply optimizations such as algorithmic simplification, adding a loopcache and adding custom operations to lower the dissipation of the ASIP. The resulting ASIP consumes 0.98 nJ (with a spreading factor of 16) per actual data bit, which is lower than an existing application specific integrated circuit (ASIC).<br/

    Implementation of an UWB impulse-radio acquisition and despreading algorithm on a low power ASIP

    No full text
    Impulse Radio-based Ultra-Wideband (UWB) technology is a strong candidate for the implementation of ultra low power air interfaces in low data rate sensor networks. A major challenge in UWB receiver design is the low-power implementation of the relatively complex digital baseband algorithms that are required for timing acquisition and data demodulation. Silicon Hive offers low-power application specific instruction set processor (ASIP) solutions. In this paper we target the low-power implementation of an UWB receiver’s digital baseband algorithm on an ASIP, based on Silicon Hive’s solutions.We approach the problem as follows. First we implement the algorithm on an existing ASIP and analyze the power consumption. Next we apply optimizations such as algorithmic simplification, adding a loopcache and adding custom operations to lower the dissipation of the ASIP. The resulting ASIP consumes 0.98 nJ (with a spreading factor of 16) per actual data bit, which is lower than an existing application specific integrated circuit (ASIC).<br/
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