Novel implementation technique for a wavelet-based broadband signal detection system

This thesis reports on the design, simulation and implementation of a novel Implementation for a Wavelet-based Broadband Signal Detection System. There is a strong interest in methods of increasing the resolution of sonar systems for the detection of targets at sea. A novel implementation of a wideband active sonar signal detection system is proposed in this project. In the system the Continuous Wavelet Transform is used for target motion estimation and an Adaptive-Network-based Fuzzy inference System (ANFIS) is adopted to minimize the noise effect on target detection. A local optimum search algorithm is introduced in this project to reduce the computation load of the Continuous Wavelet Transform and make it suitable for practical applications. The proposed system is realized on a Xilinx University Program Virtex-II Pro Development System which contains a Virtex II pro XC2VP30 FPGA chip with 2 powerPC 405 cores. Testing for single target detection and multiple target detection shows the proposed system is able to accurately locate targets under reverberation-limited underwater environment with a Signal-Noise-Ratio of up to -30db, with location error less than 10 meters and velocity estimation error less than 1 knot. In the proposed system the combination of CWT and local optimum search algorithm significantly saves the computation time for CWT and make it more practical to real applications. Also the implementation of ANFIS on the FPGA board indicates in the future a real-time ANFIS operation with VLSI implementation would be possible

Beam-steering digital num array paramétrico

Engenharia Electrónica e TelecomunicaçõesActualmente existem diversos m etodos que permitem a realiza c~ao de beamsteering num altifalante param etrico. No entanto, a maioria dos m etodos e incapaz de proporcionar uma elevada resolu c~ao angular usando um projecto de hardware e ciente. Mais ainda, poucos s~ao os sistemas que proporcionam um controlo do beam de pot^encia em tempo real. Neste documento, e proposta uma nova abordagem para colmatar estes problemas tirando partido da alta frequ^encia inerente a modula c~ao sigmadelta. Esta implementa c~ao leva a um projecto compacto que proporciona uma elevada resolu cao angular associada a uma solu c~ao de baixo custo e com baixo consumo de pot^encia devido ao uso de apenas uma DAC sigmadelta. O sistema implementado sobre FPGA alia a natural alta frequ^encia dum modulador sigma-delta ao uso dum unico shift-register para introduzir os atrasos necess arios a realiza c~ao de beam-steering. A escolha do atraso adequado e feita com o uso de multiplexers que encaminham os diversos sinais sigma-delta para as sa das do sistema desejadas.Several methods enable a steerable beam using an parametric loudspeaker. However, many of them are not able to use a high angular resolution with an e cient design. More, even the ability to change the beam steering in real time is neglected by several methods. In this document, we propose a new approach to the beam-steering problem using the intrinsic high frequency of a sigma-delta digital to analog converter conjugated with online con gurable digital delays obtained only through a programmable wide shift-register. This implementation leads to a real time beam-steering with a simple digital processing block that enables a high resolution angle. Additionally the use of a sigma-delta DAC provides a low-cost, highly integrated and energy e cient system using only a DAC. The implemented system takes advantage of the high frequency of the digital signal from the sigma-delta modulator allied with the use of a shiftregister to obtain the ne time delays necessary to do the beam-steering. The several outputs delays are chosen between the sigma-delta signals in the shift-register using a group of multiplexers

Digital Beamforming Implementation on an FPGA Platform

This work is part of UPC contribution to the CORPA (Cost-Optimised high Performance Active Receive Phase Array antenna for mobile terminals) project of ESA (European Space Agency)The objective of the work presented is to implement a Digital Beamforming (DBF) platform for an antenna array receiver designed for the S-DMB system. Our project deals with the design of antenna arrays from a hardware point of view, in contrast to other theo- retic studies regarding DBF algorithms. Hence, we will study practical aspects of DBF implementation such as signal quantization and required computational resources

Acceleration Techniques for Sparse Recovery Based Plane-wave Decomposition of a Sound Field

Plane-wave decomposition by sparse recovery is a reliable and accurate technique for plane-wave decomposition which can be used for source localization, beamforming, etc. In this work, we introduce techniques to accelerate the plane-wave decomposition by sparse recovery. The method consists of two main algorithms which are spherical Fourier transformation (SFT) and sparse recovery. Comparing the two algorithms, the sparse recovery is the most computationally intensive. We implement the SFT on an FPGA and the sparse recovery on a multithreaded computing platform. Then the multithreaded computing platform could be fully utilized for the sparse recovery. On the other hand, implementing the SFT on an FPGA helps to flexibly integrate the microphones and improve the portability of the microphone array. For implementing the SFT on an FPGA, we develop a scalable FPGA design model that enables the quick design of the SFT architecture on FPGAs. The model considers the number of microphones, the number of SFT channels and the cost of the FPGA and provides the design of a resource optimized and cost-effective FPGA architecture as the output. Then we investigate the performance of the sparse recovery algorithm executed on various multithreaded computing platforms (i.e., chip-multiprocessor, multiprocessor, GPU, manycore). Finally, we investigate the influence of modifying the dictionary size on the computational performance and the accuracy of the sparse recovery algorithms. We introduce novel sparse-recovery techniques which use non-uniform dictionaries to improve the performance of the sparse recovery on a parallel architecture

Signal Subspace Processing in the Beam Space of a True Time Delay Beamformer Bank

A number of techniques for Radio Frequency (RF) source location for wide bandwidth signals have been described that utilize coherent signal subspace processing, but often suffer from limitations such as the requirement for preliminary source location estimation, the need to apply the technique iteratively, computational expense or others. This dissertation examines a method that performs subspace processing of the data from a bank of true time delay beamformers. The spatial diversity of the beamformer bank alleviates the need for a preliminary estimate while simultaneously reducing the dimensionality of subsequent signal subspace processing resulting in computational efficiency. The pointing direction of the true time delay beams is independent of frequency, which results in a mapping from element space to beam space that is wide bandwidth in nature. This dissertation reviews previous methods, introduces the present method, presents simulation results that demonstrate the assertions, discusses an analysis of performance in relation to the Cramer-Rao Lower Bound (CRLB) with various levels of noise in the system, and discusses computational efficiency. One limitation of the method is that in practice it may be appropriate for systems that can tolerate a limited field of view. The application of Electronic Intelligence is one such application. This application is discussed as one that is appropriate for a method exhibiting high resolution of very wide bandwidth closely spaced sources and often does not require a wide field of view. In relation to system applications, this dissertation also discusses practical employment of the novel method in terms of antenna elements, arrays, platforms, engagement geometries, and other parameters. The true time delay beam space method is shown through modeling and simulation to be capable of resolving closely spaced very wideband sources over a relevant field of view in a single algorithmic pass, requiring no course preliminary estimation, and exhibiting low computational expense superior to many previous wideband coherent integration techniques

Signal Subspace Processing in the Beam Space of a True Time Delay Beamformer Bank

A number of techniques for Radio Frequency (RF) source location for wide bandwidth signals have been described that utilize coherent signal subspace processing, but often suffer from limitations such as the requirement for preliminary source location estimation, the need to apply the technique iteratively, computational expense or others. This dissertation examines a method that performs subspace processing of the data from a bank of true time delay beamformers. The spatial diversity of the beamformer bank alleviates the need for a preliminary estimate while simultaneously reducing the dimensionality of subsequent signal subspace processing resulting in computational efficiency. The pointing direction of the true time delay beams is independent of frequency, which results in a mapping from element space to beam space that is wide bandwidth in nature. This dissertation reviews previous methods, introduces the present method, presents simulation results that demonstrate the assertions, discusses an analysis of performance in relation to the Cramer-Rao Lower Bound (CRLB) with various levels of noise in the system, and discusses computational efficiency. One limitation of the method is that in practice it may be appropriate for systems that can tolerate a limited field of view. The application of Electronic Intelligence is one such application. This application is discussed as one that is appropriate for a method exhibiting high resolution of very wide bandwidth closely spaced sources and often does not require a wide field of view. In relation to system applications, this dissertation also discusses practical employment of the novel method in terms of antenna elements, arrays, platforms, engagement geometries, and other parameters. The true time delay beam space method is shown through modeling and simulation to be capable of resolving closely spaced very wideband sources over a relevant field of view in a single algorithmic pass, requiring no course preliminary estimation, and exhibiting low computational expense superior to many previous wideband coherent integration techniques

Beam-steerng digital num array paramétrico

Mestrado em Engenharia Electrónica e TelecomunicaçõesActualmente existem diversos m etodos que permitem a realiza c~ao de beamsteering num altifalante param etrico. No entanto, a maioria dos m etodos e incapaz de proporcionar uma elevada resolu c~ao angular usando um projecto de hardware e ciente. Mais ainda, poucos s~ao os sistemas que proporcionam um controlo do beam de pot^encia em tempo real. Neste documento, e proposta uma nova abordagem para colmatar estes problemas tirando partido da alta frequ^encia inerente a modula c~ao sigmadelta. Esta implementa c~ao leva a um projecto compacto que proporciona uma elevada resolu cao angular associada a uma solu c~ao de baixo custo e com baixo consumo de pot^encia devido ao uso de apenas uma DAC sigmadelta. O sistema implementado sobre FPGA alia a natural alta frequ^encia dum modulador sigma-delta ao uso dum unico shift-register para introduzir os atrasos necess arios a realiza c~ao de beam-steering. A escolha do atraso adequado e feita com o uso de multiplexers que encaminham os diversos sinais sigma-delta para as sa das do sistema desejadas.Several methods enable a steerable beam using an parametric loudspeaker. However, many of them are not able to use a high angular resolution with an e cient design. More, even the ability to change the beam steering in real time is neglected by several methods. In this document, we propose a new approach to the beam-steering problem using the intrinsic high frequency of a sigma-delta digital to analog converter conjugated with online con gurable digital delays obtained only through a programmable wide shift-register. This implementation leads to a real time beam-steering with a simple digital processing block that enables a high resolution angle. Additionally the use of a sigma-delta DAC provides a low-cost, highly integrated and energy e cient system using only a DAC. The implemented system takes advantage of the high frequency of the digital signal from the sigma-delta modulator allied with the use of a shiftregister to obtain the ne time delays necessary to do the beam-steering. The several outputs delays are chosen between the sigma-delta signals in the shift-register using a group of multiplexers

Novel implementation technique for a wavelet-based broadband signal detection system

This thesis reports on the design, simulation and implementation of a novel Implementation for a Wavelet-based Broadband Signal Detection System. There is a strong interest in methods of increasing the resolution of sonar systems for the detection of targets at sea. A novel implementation of a wideband active sonar signal detection system is proposed in this project. In the system the Continuous Wavelet Transform is used for target motion estimation and an Adaptive-Network-based Fuzzy inference System (ANFIS) is adopted to minimize the noise effect on target detection. A local optimum search algorithm is introduced in this project to reduce the computation load of the Continuous Wavelet Transform and make it suitable for practical applications. The proposed system is realized on a Xilinx University Program Virtex-II Pro Development System which contains a Virtex II pro XC2VP30 FPGA chip with 2 powerPC 405 cores. Testing for single target detection and multiple target detection shows the proposed system is able to accurately locate targets under reverberation-limited underwater environment with a Signal-Noise-Ratio of up to -30db, with location error less than 10 meters and velocity estimation error less than 1 knot. In the proposed system the combination of CWT and local optimum search algorithm significantly saves the computation time for CWT and make it more practical to real applications. Also the implementation of ANFIS on the FPGA board indicates in the future a real-time ANFIS operation with VLSI implementation would be possible.EThOS - Electronic Theses Online ServiceGBUnited Kingdo